FPGA VERILOG 1

Dear customer, I am really happy to help you out of this project. I would like to introduce that I am an freelancer with 100% JOB COMPLETED in VHDL/VERILOG. I am really suitable for job description: First: I am an Electronics engineer who is very expertise with VHDL/Verilog. In fact, I have done so many project of VHDL/Verilog(Karatsuba multiplier, Nintendo design, encryption algorithm like Sax Hash, Bernstein Hash, HummingBird...Also, I participated in a Walker Recognition project(data from Camera to Human Detection(image processing-HOG feature and Adaboost) and display in VGA). Besides,,I implemented the image conpression (wavelet transform). Aslo, I have experience in coding Booth multiplier and very familiar with Xilinx tools like ISE. and Vivado. Therefore, I can simulation the projecthe in behavior, post-syntheize... with free hesitation. I am also have experience of freelancer here: https://www.freelancer.com/u/ducdctoandh.html Also, I am very good in English (IELTS 6.0) and I have several year of researching so I can fully understand your requirement and understand fully about the papers and write the academic report. Please contact me and let me know if you want any special requirement and do with lower price. Thank you.

Hi, -FPGA design engineer since last 7 years -Expertise in verilog/VHDL Please find below details of the projects TSMAC Hardware acceleration(3months) The project is to develop hardware acceleration block for TSMAC IP to reduce the overhead created in software for packet creation and detetction. CSI-2 transmitter and receiver(6months) The project is to develop CSI-2 transmitter and receiver IPs according to the mipi standards eMMC Host Controller and Device controller(3months) The project is to develop eMMC host and Device controller IP according to the JEDEC standards. Mobile camera–testing(3months) The project is to develop 3D image processing algorithms on 1K sensor from PMD technologies High resolution camera(6.5months) The project is to develop 2D and 3D image processing algorithms on 100K sensor from Infineon sensor -Test project for DDR2 accesses -Development of calibration module -Development of chain control module -Development of control signal generator -Development of Generic LUT module -Development of Divider radix-2 algorithm -Development of atan calculator -Development of MCB reader state machine Color Pipeline(15months) The project is to develop 2D and 3D image processing algorithms on Aptina sensor -Development of Generic Frame Buffer pCore -Development of data compression and data packing pCore -Development of data packing pCore Video Processing Unit(13 months) -Improvement in algorithms to reduce FPGA resource utilization and decrease latency

Hi I have 12+ years of experience in Verilog , please let me know further about this work , I can provide you correct solution in given timeline. Thanks SK

Hi I have 5 yrs experience in design & Verificaioni can work on this project.I have expertise in desing using vhdl verilog

hi, My name is Mohamed. I have 5 years experience in Digital Design and VHDL. I checked your project and I am interested in more details. Regards

Hello, my name's Jorge, I am an electronics engineer with experience in embedded systems. Please share with me more details of your project to see how can I help you. I'd be glad to answer nay doubt you may have in order to get your project going. Thanks for your time.

I have good knowledge in verilog and vhdl . my plan i) understand the requirements ii) plan the work according to requirement iii) start the work according to client iv)inform project completion to client we can discuss more information through chat

Greetings sir, i am an expert freelancer for this job and your 100% satisfaction is assured if you allow me to serve. Here is the reason. Why you should pick me? a) I am a very expert and have the same kind of experience of 5 years. b) I work very hard (16+ hours a day and 7 days a week) and also very fast so... it will be done very soon than most of the other providers c) And most important part is my policy: "I will give you (to my client) life time support (as long as you keep relation with me). And fix any bugs/problem without any cost. So, don't ever worry about me” Please sir, leave a reply ASAP, as I am waiting for your kind reply

I have not used VHDL for quite a while as for Verilog it is OK . Working on FPGA for seventeen years, Altera,Xilinx,Lattice. My quote will be accurate if I have an Idea of your project. Thanks Adip

Hello. My name is Tigran... I have experience in python and verilog more that 3 years... I would like to have the opportunity to do this task... Thnx in advance.

Hello, Could you, please outline the top level of your project? Thanks, Ashot ............................

Greetings, I have good expertise with VHDL/Verilog and might be able to help. However would need details of what you need in order to give you a better estimate of time and price. T & R Alok Pugalia

i have 4 years of experience doing ASIC and FPGA Design and verification using Verilog and System Verilog in Nvidia and Xilinx. Let me know a convenient time to discuss details of the project.

we are expert in verilog HDL. we can do both RTL & TB design for any verilog based project and can work with low budget.