Measure clock jitter based on ADC sampling

par shield2013
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The research which is using ADC to measure picosecond clock jitter and its distribution contains three aspects such as the "basic principle research", "core algorithm" and "engineering". There are two key issues which need to be addressed, First, verify the accuracy of the math model of the relationship between the ADC, the sample values and the sample clocks. This is the basic premise and foundation of this study; the picture shows the clock jitter testing filed.

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Me concernant

10+ years digital circuit design expert of digital signal processing based on FPGA proficient of Verilog/VHDL

$15 $ US / h

NOUVEAU FREELANCE !

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