Image de profil de raulbehl
@raulbehl
Drapeau de India Jammu, India
Membre depuis February, 2015
6 Recommendations

RB-12

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I am currently working as a Design and Verification engineer at a leading Processor Development firm. My skills set include: i) Matlab/LabView/Logisim ii) Engineering Mathematics iii) Assembly (ARM, MIPS, PLP, x86, MARIE and pep/8) / Computer Architecture iv) Verilog/System Verilog/UVM v) Raspberry Pi/Arduino/TMS320C5535 eZdsp/TM4C123 vi) PSpice vii) C/C++, Qt, Python viii) Perl Happy to help! :-)
$25 $ US / h
96 commentaires
5.9
  • 98%Travaux complétés
  • 98%Dans le budget
  • 99%À temps
  • 23%Taux de réembauche

Portfolio

Commentaires récents

  • image de mohammadrashid62 Assembly language - open to bidding $83.00 CAD

    “Hired him for an assembly language assignment. He provided very high quality work and met all the requirements. Highly recommend. Would definitely hire again”

  • image de NaraStrange 4 bit Comparator $25.00 USD

    “did a good job. and was on time with said project. the project was done to my expectations”

  • image de dineshkothamasu Designing a Debug logic in Verilog ₹7222.00 INR

    “Would like to work with him again..:)”

  • image de okanata85 Project for raulbehl $175.00 USD

    “He did a great job and he worked so good on my project, this was a very long one that required extra work, many hours of work, I will hire him again and I highly recommend him to anyone who is looking for a great engineering job. Thanks again. Outstanding Experience!”

  • image de ymichael design testbench in SystemVerilog for TCP/UDP/IP packet generation and testing $555.00 USD

    “Excellent freelancer!”

  • image de shan7m3 Building a LC-3 Simulator $0.01 USD

    “The individual sounded very optimistic about the project but then on the day of decided to bail on the project. He did not make any work on the last day and has not replied to any of the messages after bailing. He is a very unreliable indivigual and although sounded very optimistic was very deceiving and just wanted to scam me.”

Expérience

Open Source Hardware Developer

Nov 2016

SimpleCPU is a CPU design and verification platform with a bunch of design and verification tools under its hood. SimpleCPU is aimed towards students and researchers, helping them learn and easily carry out CPU simulations in an intuitive way. Developed a Verilog based MIPS CPU (covering both pipelined and non-pipelined ones) Developed C model for MIPS architecture and developed the SimpleCPU's very own co-simulation environment for functional testing Currently, working on RISC-V based CPUs

Open Source Developer

Oct 2015 - Mar 2016 (5 months)

Volunteer for the open source project Mixxx, a free DJ application for Windows, Mac, and Linux. Initially became familiar with codebase and QT and fixed few wishlists bugs.

Intern

Jul 2015 - Dec 2015 (5 months)

• Understand the basic work flow of the Memory Sub-system team and implement functional coverage model for external memory controller • Ported the random and directed tests to next product versions • Used SystemVerilog functional coverage extensions for specifying the coverage model • Found few corner cases in the testbench by analysing the coverage bins

Éducation

B.E. Hons Electronics and Instrumentation

2011 - 2015 (4 years)

Certifications

edX Verified Certificate for Embedded Systems - Shape the World (2016)

edX UT.6.02x

Successfully completed and received a passing grade in : Embedded Systems - Shape the World a course of study offered by UTAustinX, an online learning initiative of University of Texas System through edX.

Certifications

  • C 1
    87%

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