I am working as ASIC Design and Verification Engineer with nine years of experience. Having extensive experience in Design and Verification using Verilog,Systemverilog, also I have experience in Training for individual and corporates.  Around 9 years of total working experience in VLSI Design and Verification and Embedded product development.  Ability to lead a project  Experience in creating embedded product development from Idea to prototype  Experience in Micro-Architecture design, RTL Coding / Integration, Synthesis, Timing Closure and On-chip debugging.  Experience of working on industry standard protocols and interfaces like, Ethernet, I2C, UART,SPI  Experience on working with Logic Analyzer, Scopes, Multimeters  Sound coding skills in C, Embedded C, Verilog, System Verilog and VHDL.  Good experience on working with AMBA AHB and knowledge on AXI, I2C, UART,SPI  Documentation skills on various Application notes, Designs and Verification Strategies.  Good experience on working with SOC environments.  Exposure in developing Verification Environment, Behavioral Models and Test-Cases.  Complete design cycle of a system which includes RTL coding/Integration, Verification, Synthesis, STA and Board bring-up.  Specs: AHB/APB, I2C, UART, Ethernet 10/100., Basic Knowledge on AXI,  Knowledge in maintaining projects in CVS and maintaining checklists and QIP.  Ability and adoptability to grasp new technologies, very quickly. Technical Skills : HDLs : Verilog, VHDL HVLs : System Verilog Programming Language : C, Embedded C Embedded Tools : MPLAB, Code Composer Studio, Psoc, ORCAD Assembly Language : 8085, 8086, 89C51 Microcontrollers known : PIC 16f877A, MSP430FR5969 EDA Tools : Synthesis Tools : Synopsys Design Compiler Simulation tools : ModelSim Simulator Verification tools : Mentor Graphics Questasim Vendor Specific FPGA Design tools : Xilinx ISE, Altera Quartus II Scripting languages : Shell and PERL Other Languages : Python Operating Systems : Windows & Linux