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VLSI Design

I Need a VLSI work to be done using verilog. It can be run using Xilinx ISE or Vivado

Compétences : FPGA, Verilog / VHDL

Voir plus : VLSI design, xilinx ise project, xilinx ise dac, bidplaza it work, xilinx ise simulation save results matlab, excel run project work publish website work, xilinx ise simulink matlab, xilinx ise vhdl code communication, modelsim xilinx ise compile, simulink xilinx ise, work image vector need someone

Concernant l'employeur :
( 3 commentaires ) san antonio, United States

N° du projet : #8523507

29 freelance ont fait une offre moyenne de 425 $ pour ce travail

loi09dt1

A proposal has not yet been provided

250 $ USD en 1 jour
(68 Commentaires)
5.9
kamranbabarnust2

I had done MS in Digital system design and VLSI design. Also I had 8+ years of experience in the field of FPGAs, Verilog HDL and VHDL. I am very familiar with Xilinx ISE software. I can do this task for you.

250 $ USD en 3 jours
(30 Commentaires)
5.1
uetian09ee506

I am an Electrical Engineer having specialization in Electronics and Control, teaching in Electrical Department at FAST National University Pakistan. I am also continuing my MS degree in Electrical Engineering with spe Plus

300 $ USD en 7 jours
(25 Commentaires)
4.6
ducdctoandh

I would like to bid this job because I am really suitable for job description: First: I am an Electronics engineer who is very familiar with C++/C/Mathlab/VHDL/Verilog. In fact, I have done so many project of C++/C/Ma Plus

250 $ USD en 10 jours
(14 Commentaires)
4.4
shobhitkapoor

Hi I am expert in verilog and having 10+ Years of experience with Verilog ( ISE ) and around 3 years of Experience with Vivado , I am comfortable in both of the tools , Please let me know what is your exact pro Plus

555 $ USD en 10 jours
(11 Commentaires)
4.2
KarimRagab

I am an embedded software engineer with years of experience in verilog and C/C++, doing my thesis with 'A' total subject's grade in artificial intelligence and machine learning. I will do my best to meet your expecta Plus

278 $ USD en 3 jours
(6 Commentaires)
2.8
sud1312

Hi, we are a team of experienced programmers very well versed in VHDL/Verilog, FPGA, SystemVerilog, Linux. we have implemented various algorithms like humming bird algorithm. we are pretty much sure of doing this ef Plus

250 $ USD en 10 jours
(0 Commentaires)
0.0
coily

I'm working on Analog Mixed Signal project at a semiconductor company. And I have enough tools to perform your requests regarding Verilog. (Cadence Tool)

277 $ USD en 10 jours
(0 Commentaires)
0.0
thiyagarajan6792

A proposal has not yet been provided

555 $ USD en 10 jours
(0 Commentaires)
0.0
sicelile

Hi I would appreciate an opportunity to work on your project. My previous work with VHDL and Verilog on Xilinx ISE has been in computer vision and classification of features for various machine earning projects. Plus

555 $ USD en 14 jours
(0 Commentaires)
0.0
paramvlsi

A proposal has not yet been provided

333 $ USD en 5 jours
(0 Commentaires)
0.0
mecatronicman

Completion time based on spec, I have Professional experience using Xilinx FPGA and ISE design suite. Looking forward to your reply! Carlos

833 $ USD en 10 jours
(0 Commentaires)
0.0
ReconLogic

Hello! I am a professional FPGA/ASIC developer. I am new to freelancer as I have a full-time job so would not see projects on my profile, You can share more detail about the work so that realistic goals can be discu Plus

400 $ USD en 10 jours
(0 Commentaires)
0.0
jalarajasekhar

i did vlsi projects as part of my academics.i am good i digital [url removed, login to view] the task was described and given a chance to do that project i am happy to do that projects

250 $ USD en 10 jours
(0 Commentaires)
0.0
sampadathorat

I have completed PG diploma in VLSI from CDAC, Pune in Aug 2015 with project on “Implementation of Template Matching Algorithm on FPGA”.I am well versed with HDL like VHDL, Verliog. I have completed ME in digital syste Plus

555 $ USD en 10 jours
(0 Commentaires)
0.0
divyaramkumar222

XILINX Implementation is possible for any VLSI System if the requirement is clear, we can finish the Design within 2 days

444 $ USD en 5 jours
(0 Commentaires)
0.0
singhhed

Having worked on various industry projects in the past decade, I have the requisite exposure to complete the synthesis ready netlist. Please feel free to discuss more with more details.

500 $ USD en 10 jours
(0 Commentaires)
0.0
raghumanohar

Hello, I represent a company SARVASYA semiconductors, we are involved in designing the digital IP cores using Verilog/VHDL coding Please go through our website to know more about us [url removed, login to view] Plus

500 $ USD en 20 jours
(0 Commentaires)
0.0
hazleen

Please email your specifications to my email address wiradesigner@ gmail.com. I have taped out several ASIC and SoC designs successfully through out my 16 years of experience.

250 $ USD en 10 jours
(0 Commentaires)
0.0
shabbir11255

Hi I am an electrical engineer and a lecturer in a reputed university. I can do the job for you. Please send me the details and let me know how can I help you.... I will provide with running which will be fully com Plus

600 $ USD en 10 jours
(1 Commentaire)
0.0