Fermé

VHDL coding of LVDS between two FPGA`s

I need a VHDL code of LVDS transmission between two FPGA`s. It is a 4 lane LVDS operating at 833.33MHz to transfer information from USART of 1st FPGA to USART of 2nd FPGA.

Compétences : Verilog / VHDL, FPGA, Microcontrôleur, Programmation C, Génie Électrique

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Concernant l'employeur :
( 0 commentaires ) Romania

Nº du projet : #28931246

4 freelances font une offre moyenne de 81 $ pour ce travail

(471 Commentaires)
8.0
alexmalki

Dear Sir, I am Alexandre Malki an software and hardware embedded engineer. I am bidding to your offer since i think this opportunity is interesting for me and  I am sure I can offer my knowledge to fulfil your tasks. I Plus

%bids___i_sum_sub_35% %project_currencyDetails_sign_sub_36% USD en 10 jours
(7 Commentaires)
5.4
inspiredwhiz

Hi! I am an Electrical Engineer with specialization in Electrical Engineering, Verilog / VHDL, Microcontroller, C Programming and FPGA. I have high proficiency in Electrical Engineering, HVAC, LTE system model, Thermal Plus

%bids___i_sum_sub_35% %project_currencyDetails_sign_sub_36% USD en 6 jours
(12 Commentaires)
4.6
athulb

Hi, Im a FPGA developper. i have 4 year of experince. i can do this project with in time and less budge. Please check my profile,contact me for further discusion. [Chating about project is free in this site]

%bids___i_sum_sub_35% %project_currencyDetails_sign_sub_36% USD en 5 jours
(11 Commentaires)
3.8