Fermé

Quartus II / VHDL Coding

3 freelances font une offre moyenne de 207 $ pour ce travail

yanatejaip5s

I have a lot of experienced in doing RTL Design with Verilog and Verification as well. I used to work as a Researcher at the OFDM Transciever group to make a lot of IP Core or module with Verilog such as Convolution En Plus

%bids___i_sum_sub_32% %project_currencyDetails_sign_sub_33% AUD en 1 jour
(1 Évaluation)
1.3
Sbehjoo

Hi I have M.Sc. in Digital Electronics and we've been working for the last two years in the field of digital circuit design using VHDL and verilog . We also use ISE, vivdo modelsim to perform simulations. i took bid in Plus

%bids___i_sum_sub_35% %project_currencyDetails_sign_sub_36% AUD en 7 jours
(1 Évaluation)
1.4
ghaziaousaji

Hi, I am a VHDL designer and I have more than 2 years of experience. I used to work on complex hardware designs for telecommunication systems. Feel free to reach out for me for further details.

%bids___i_sum_sub_35% %project_currencyDetails_sign_sub_36% AUD en 7 jours
(0 Commentaires)
0.0