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I need system verilog

2 freelances font une offre moyenne de 2750 ₹ pour ce travail

IslamAdam998

Dear sir, I am a digital design engineer expert in FPGA and ASIC design flows using Verilog and VHDL programming. Also, I am experienced with Vivado, ISE, Vivado IPs, SDK, Quartus, DC Compiler, ICC and others. Please Plus

%bids___i_sum_sub_35% %project_currencyDetails_sign_sub_36% INR en 5 jours
(16 Commentaires)
4.0
kundanvaghela

i have 2.5+ year experience in design and verification, i have done 30+ project in verilog/VHDL, i will done your project perfectly and on time, i will provide support after completion of project, thanks and regard Plus

%bids___i_sum_sub_35% %project_currencyDetails_sign_sub_36% INR en 7 jours
(12 Commentaires)
3.6