Looking for an Xilinx vivado FPGA programming and Matlab HDL coder expert.

I'm looking for a FPGA Firmware engineer who has rich experience in FPGA and VHDL/verilog programming. The right candidate should have an experience in Matlab and HDL Coder. The board is Zynq FPGA controller.

The project is to implemente a Xilinx partial reconfiguration model for an SDR on the AD9361-Z7035 with ADRV1CRR-BOB. Also should have telecommunication knowledge.

Please bid with the word "Matlab/HDL".

Compétences : Verilog / VHDL, Matlab and Mathematica, FPGA, Ingénierie des Télécommunications, Logiciels Embarqués

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Concernant l'employeur :
( 3 commentaires ) Chisinau, Moldova, Republic of

Nº du projet : #29406702

8 freelances font une offre moyenne de 21 $/heure pour ce travail


Looking forward to your response. I am senior matlab developer with 10 years of experience. I have worked on matlab, C++, C#, python. I have a lot of experiences in many "Matlab/HDL" Projects. We can chat in more d Plus

$20 USD / heure
(88 Commentaires)
(27 Commentaires)

MATLAB/HDL Hello team. We have seen your requirement is that you need to implement some algorithm in ZC706 carrier board with AD9361 evaluation modular for a signal processing application. I’m well experienced with t Plus

$17 USD / heure
(15 Commentaires)

FPGA + MATLAB Expert Here I carefully read your project requirements and I understand that you want to design FPGA verilog based project, yes I will design it for you just in 4 to 5 hours from now. I am expert in this Plus

$20 USD / heure
(14 Commentaires)

Matlab/HDL, Hi, I am a VHDL and FPGA developer i can do the task perfectly. I also worked using FPGA in the loop using Matlab and Simulink. Please contact me. I have much experience with what you are looking for

$20 USD / heure
(10 Commentaires)

Hello, I am an electrical engineer and microelectronics is my major. I also have a master thesis in communication systems. I am currently working as an embedded system engineer in the telecommunication field. My work Plus

$20 USD / heure
(0 Commentaires)

Matlab/HDL Hi, im enginner from WUT in Warsaw. I have very rich experience with Matlab and HDL( I prefers Verilog). Recently I completed huge DSP block(with IIR filters, etc). I have telecommunication knowladge abot Plus

$20 USD / heure
(0 Commentaires)

Hello, Greetings of the day !!! This is Dhruv. Our team has already worked on this before and have rich experience in zynq FPGA and VHDL/verilog programming since last then 10 years. Currently we are working on ultra Plus

$25 USD / heure
(0 Commentaires)