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An embedded systems project for real time audio file processing.

To create an real time audio processing embedded project in verilog using the Altera DE2-115 FPGA kit with the FPGA chip type Cyclone IV EP4CE115F29C8. The project can use loudspeakers as peripherals and VGA to display the audio signals. The aim of the project is to play an audio file and perform various real time processing such as adding noise and filtering the noise. To perform high pass filtering and low pass filtering on the audio file and to show their difference via loud speaker as well as displaying them on monitor via VGA. The software used to program the device is Altera Quartus II version 11.1 sp2 and model sim altera starter edition [url removed, login to view] for sp2.

Compétences : FPGA, Verilog / VHDL

Voir plus : vhdl and verilog, real time embedded systems, code project store video audio file database play audio player asp net, time clock systems project billing, embedded systems project, time transcribe min audio file, turn around time hour audio file transcription, j2me code real time mobile video streaming project, embedded systems 80196 open project, multisim audio signal processing project help, project embedded systems

Concernant l'employeur :
( 3 commentaires ) Belconnen, Australia

N° du projet : #8467397

Décerné à :

ahmedmohamed85

Dear sir I have more than 8 years experience in digital design using FPGA, also I already have the Altera DE2-115, please check my profile also please message me so that we can discuss

444 $ AUD en 10 jours
(184 Commentaires)
7.2

11 freelance font une offre moyenne de $593 pour ce travail

loi09dt1

Dear Sir, Please visit my profile to see my expertise and experience on this field. Please contact me and we can discuss more. Thanks. Loi

250 $ AUD en 10 jours
(64 Commentaires)
5.9
zarnescugeorge

Hello! I can help you right away! Send me your detailed requirements! I have experience with altera fpgas! Have a nice day! My bid is negotiable! Can be lower if I see the detailed specs!

388 $ AUD en 10 jours
(36 Commentaires)
5.0
kamranbabarnust2

I had done MS in Digital design and Digital Signal processing. Also i had several years of experience in the field of FPGA, VHDL, Verilog HDL etc I can do this task for you

1111 $ AUD en 10 jours
(10 Commentaires)
4.7
ducdctoandh

I would like to bid this job because I am really suitable for job description: First: I am an Electronics engineer who is very familiar with C++/C/Mathlab/VHDL/Verilog. In fact, I have done so many project of C++/C/Ma Plus

333 $ AUD en 5 jours
(9 Commentaires)
4.1
hazleen

Have more than 10 years of multinational companies working experience in IC and FPGA Design including hardware and software.

611 $ AUD en 10 jours
(0 Commentaires)
0.0
rameshsundar82

I can do this project and complete with in time limit..

555 $ AUD en 10 jours
(0 Commentaires)
0.0
nrameshyadav

I have been working in the ASIC and FPGA domain from past 6 years. I developed much more complex modules in Verilog and dumped them in FPGA from Xilinx and Altera. I will be the perfect fit for this.

666 $ AUD en 10 jours
(0 Commentaires)
0.0
bharathkchow

I work for a High performance Analog IC manufacturing company, which manufactures Sensors and Sensor Interface ASICs and Battery management, lighting management ASSPs etc. I can address and solve analog related problem Plus

666 $ AUD en 10 jours
(0 Commentaires)
0.0
gpsanjeewa

Hi, Interested in and will deliver in 10 days. Apparently, I'm an electronic engineer working in the same field. Regards, ********************************************************************

1000 $ AUD en 10 jours
(0 Commentaires)
0.0
gtpd

We have done this sort of Project on Xilinx FPGA before. So it will be easy for us to do on Altera.

500 $ AUD en 10 jours
(0 Commentaires)
0.0