i am having the above mentioned topic for my project work i dont have any experience with vhdl/veriloget.. please is there anybody who can do the project or give me ideas regarding it
17 freelance ont fait une offre moyenne de 133 $ pour ce travail
Dear sir, I have 5 years' experience in digital system design using VHDL for FPGA's and CPLD's both for Xilinx and Altera please check your PM
I have been working in Verilog and have done several projects at my university. This one is pretty easy as compared to the ones I already have done. I assure you completion of it in time.
I have been coding on VHDL for XILINX FPGAs for 5 years. I have been designing Digital Signal Processing Algorithms on MATLAB and implementing the algorithms on FPGAs and microcontrollers.
hey, I am an electronic engineering undergraduate from sri lanka who has a very good experience in verilog and xilinx fpga. see the pm for more details