Attached file is the project description and the lab report format. Please read that and make a simple report. It is very low requirement, just give me a simple and short report. Like two to three pages.
4 freelance ont fait une offre moyenne de 56 $ pour ce travail
I had done MS in Engineering. Also I had several years of experience in the field of Digital Design, fpga, Verilog HDL VHDL. I can do this task for you.