Given a set of instructions in binary, disassemble it into MIPS instructions. Create a 5 stage pipeline simulator. Produce a cycle-by-cycle simulation showing the processor state at each cycle. The processor state includes the contents of registers, buffers, cache, and data memory at each cycle. You do not need to implement exception/interrupt handling.
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- Sample input file: [url removed, login to view]
- Sample output file: [url removed, login to view]
- Disassembler and Current Simulator: [url removed, login to view]
3 freelance font une offre moyenne de $106 pour ce travail
Hey ! I'm SAYAN PROGRAMMER I've reviewed your complete job description, and I fulfill all the qualifications required for this project. I have more than 15 years of experience in this field. I am sure if you will Plus