According to ITRS (International Technology Roadmap for Semiconductor) day by day scaling are needed in IC. Short Channel Effects (SCEs) is one of the critical issues in terms of scaling MOSFET. As the channel length is reduced to increase both the operation speed and the number of components per chip, the so-called short channel effect arises. As expected, scaling the channel length results in increasing the current and decreasing the threshold voltage; however the threshold voltage will be incompatible because of the short channel effect. As a result, we have to change the structure of the conventional MOSFET. By using the FinFET we will be able to overcome the above problems. In conventional MOSFET, the variation of threshold voltage starts from 45nm of gate length where as in this paper a falling down of threshold voltage is much smooth and less inconsistent have been tried, so far. At the same time the improvement of threshold voltage is tried by varying the substrate doping concentration, junction source and drain diffusion region and oxide thickness of bulk MOSFET.
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I am an IIT graduate (B.Tech+[url removed, login to view]), and can esily take up the project. Please see pm.
Thank you for this opportunity. This expression of interest is supported by my short profile in the PMB and website portfolio.
Hi, I am from one the top engineering college in India (IIT) and I am working on sub micron technology since 5 year. I understand FinFETs. It will be helpful if you can give more information about what do you want from Plus