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Circuit Design Electrical Engineering EE Electronics - Project 3

There is total 4 problems... Here's the perview... Problem 1 Design a 2-to-1 Multiplexor using Transmission-Gates (a pair of P- and N-channel transistors) and Inverter(s), by taking the following steps: a) Design the truth table, design and draw the circuit schematic diagram. b) Determine the size of transistors and state the criteria used in the determination. c) Derive VoutL and VoutH by calculating the voltage drops through the Transmission gates (assuming the technology process data outlined in Chapter 6 Section4, and with CL = [url removed, login to view]). d) Design the physical layout (polygon) patterns following the design rules described in Chapter 6 and in the lectures, and try to minimize the over all layout area. e) Draw a clean physical layout on a graph paper sheet using the following color map: Blue for metal layer, Black for contact, Red for Poly layer, Yellow for P ??" diffusion, and Green for N-diffusion. Label each signal terminal properly. f) Assemble answer sheets behind this page according to the above order. Problem 2 Design a positive edge-trigged (Master-Slave) D-type FlipFlop, with an asynchronous RESET, by taking the following steps. a) Design the truth table, design and draw the circuit schematic diagram and justify the chosen circuit type in one paragraph with no more then 50 words. b) Determine the size of transistors and state the criteria used in the determination. c) Calculate the rise-time and fall-time (assuming the technology process data outlined in Chapter 6 Section4, and with CL = [url removed, login to view]). d) Design the physical layout (polygon) patterns following the design rules described in Chapter 6 and in the lectures, and try to minimize the over all layout area. e) Draw a clean physical layout on a graph paper sheet using the following color map: Blue for metal layer, Black for contact, Red for Poly layer, Yellow for P ??" diffusion, and Green for N-diffusion. Label each signal terminal properly. f) Assemble answer sheets behind this page according to the above order. *************************************************** See All problems in Attachment

## Deliverables

1) Complete and fully-functional working program(s) in executable form as well as complete source code of all work done. 2) Installation package that will install the software (in ready-to-run condition) on the platform(s) specified in this bid request. 3) Complete ownership and distribution copyrights to all work purchased. 4) Final Project should be scanned and then emailed.

## Platform

Windows

Compétences : Ingénierie, MySQL, PHP, Architecture Logicielle, Tests de Logiciels, Hébergement Web, Administration de Site Web, Tests de Sites Web

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Concernant l'employeur :
( 8 commentaires ) Yonkers, United States

Nº du projet : #2951272

1 freelance fait une offre moyenne de $34 pour ce travail

hitechhuman

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