En cours

Xilinx Zynq 7020 / GPS Software Defined Radio Receiver / Baremetal / Petalinux

Development to be performed on Vivado 2019.1 version using Xilinx Zynq 7020 in order to:

- Acquire Galileo and GPS signals in real time (FFT and IFTT)

- Track Galileo and GPS signals in real time (DLL and PLL)

- Demodulation of the Galileo and GPS signals (bit synchronisation and demodulation)

Timeline:30 days

Compétences : FPGA, Verilog / VHDL, GPS, Electronique, ARM

En voir plus : software defined radio android, software defined radio linux gui, software defined radio gui, linux rtl software defined radio, vhdl software defined radio, verilog software defined radio, Software defined radio, sdr software defined radio, software defined radio transceiver, software defined radio projects, software defined radio receiver, software defined radio kit, labview software defined radio, projects on software defined radio, software defined radio architecture, software defined radio transmitter, introduction to software defined radio, software defined radio ppt, software defined radio block diagram, software defined radio software

Concernant l'employeur :
( 0 commentaires ) Toulouse, France

Nº du projet : #30933461

Décerné à:


Hello! This is one of the most interesting projects I saw here. I can help you with it, but need some clarification. First of all Verilog or VHDL? The second, do you need to implement only deconvolution blocks to detec Plus

%selectedBids___i_sum_sub_7% %project_currencyDetails_sign_sub_8% EUR en 21 jours
(0 Commentaires)

12 freelances font une offre moyenne de 1309 € pour ce travail

(472 Commentaires)
(52 Commentaires)

Hi, Dear Client! *********************************************************** SHARING IDEAS AND INSPIRATIONS FOR YOUR PROJECT. PROVIDING A GOLDEN OPPORTUNITY TO RECEIVE THE BEST TECHNICAL SERVICE. ********************** Plus

%bids___i_sum_sub_35% %project_currencyDetails_sign_sub_36% EUR en 25 jours
(11 Commentaires)

Hi, I am a senior digital design engineer, I have a broad knowledge of digital design in ASIC and FPGA using both VHDL and Verilog. I am using Vivado, ISE, and Quartise for FPGA, using DC, ICC, and prime-time for ASIC. Plus

%bids___i_sum_sub_35% %project_currencyDetails_sign_sub_36% EUR en 30 jours
(30 Commentaires)

Dear sir, I am a digital design engineer expert in FPGA and ASIC design flows using Verilog and VHDL programming. Also, I am experienced with Vivado, ISE, Vivado IPs, SDK, Quartus, Design Compiler, IC Compiler and othe Plus

%bids___i_sum_sub_35% %project_currencyDetails_sign_sub_36% EUR en 7 jours
(20 Commentaires)

Hello you. i just read your desctiptions about project. I have 5 years experience about design and write code for FPGA board use VHDL . if you need any support to do this project, please contact with me to discuss mo Plus

%bids___i_sum_sub_35% %project_currencyDetails_sign_sub_36% EUR en 20 jours
(0 Commentaires)

Dear Client I'm interested in your project and I can do it with the perfect method and time. I'm an expert in the design and development of analog, RF and digital integrated circuits using Cadence virtuoso, synopsis, O Plus

%bids___i_sum_sub_35% %project_currencyDetails_sign_sub_36% EUR en 20 jours
(0 Commentaires)

I have more than 10 years of experience in designing electronic circuits in the fields of GSM/GPRS, 3G, LTE, GPS/GLONASS, Bluetooth, Audio Amplifier, RF 315/433Mhz, Zigbee, Lora, Solar, Mosbus... .. During this time, I Plus

%bids___i_sum_sub_35% %project_currencyDetails_sign_sub_36% EUR en 20 jours
(0 Commentaires)

- previous experience in such topics; - eager to discuss a lot in this chat stream; - degree stats - maths;

%bids___i_sum_sub_35% %project_currencyDetails_sign_sub_36% EUR en 5 jours
(0 Commentaires)

Hi, Sir. I have gone through your project details. I have ever bidden to your prior project. I can do your project perfectly as I am an expert in FPGA embedded systems and digital signal processing. Please contact me, Plus

%bids___i_sum_sub_35% %project_currencyDetails_sign_sub_36% EUR en 30 jours
(0 Commentaires)
(0 Commentaires)