Terminé

FPGA design using ALTERA

The job is simple, I need a way to control clock frequency in ALTPLL IP function in Quartus 14.0 altera FPGA software.

Task: I want to use altera fpga bemicro max 10 (10M08DAF484c8GES) push buttons to control the output clocks c0, c1 clocks and respective phase shift in PLL. That's it.

Detailed explanation: In this Altera files I have implemented PLL to generate switching frequency for my circuit i.e., 9 kHz with a phase shift of 180 degrees, so c0 = 9000 Hz, 45 % duty, 0 phase shift, and C1 = 9000 Hz, 45 % duty, 180 degree phase shift. So I want the project to be done in such a way that I can change the C0 and C1 both frequencies from range 5000 Hz to 12000 Hz by incrementing or decrementing by 1 Hz, for instance if I push the button I want to see output of PLL c0 and c1 as 5001 Hz with 45 % duty both, 0 degree phase shift on C0 and 180 degree phase shift on C1, similarly if I once again press the push button the frequency has to go to 5002 Hz.

Please let me know if you have any other questions. I have attached the files of project, so just import them and make it work.

Compétences : FPGA

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Concernant l'employeur :
( 2 commentaires ) Fayetteville, United States

Nº du projet : #10068133

Décerné à:

ahmedmohamed85

Dear sir I have more than 9 years experience in digital design using FPGA, please check my profile also please message me so that we can discuss

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(20 Commentaires)
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