Design a hardware structure for Turbo Product Code(64,57)decoder

Design a hardware structure for Turbo Product Code(64,57) decoder. The processes of the row and column calculation should be executed in serial. Hardware based on SISO decoding algorithm and 2 Chase -Pandiah algorithm. The number of bits however should be remain the same is 64×64.

Compétences : Design de circuits, Génie Électrique, Electronique, Ingénierie, Verilog / VHDL

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Concernant l'employeur :
( 0 commentaires ) Beijing, China

Nº du projet : #17088286

7 freelance font une offre moyenne de ¥52/heure pour ce travail


I should be able to help you writing any coding regarding those algorithms. I am educated up to phd in computer science.

¥74 CNY / heure
(7 Commentaires)

Hello my name is Maria I am an electronic engineer, I would love to design this structure for your, I have plenty of experience working with electronic and electric designs (squematic and PCB layouts), programming micr Plus

¥45 CNY / heure
(5 Commentaires)

I have over 10 years of experience in VHDL Programming. Have worked on LDPC encoder and Decoder. Are you referring any IEEE paper.

¥67 CNY / heure
(5 Commentaires)
¥45 CNY / heure
(14 Commentaires)

Hi, We Rogtech having 10+ years of hands on experience in crypto cores such as AES, SHA, RSA and ECC cores such as Reed Solomon and Turbo Decoder. We have worked on extensively in design, Verification and FPGA implem Plus

¥66 CNY / heure
(1 Évaluation)

this is a good project so i am intersted that so i am a pcb desginer garber data creat for coustmer and

¥45 CNY / heure
(0 Commentaires)
¥22 CNY / heure
(0 Commentaires)