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Make verilog code testable DFT electrical engineer

Requiring a electrical or electronics engineer with knowledge of DFT and testibility.

You will be modifying verilog code to make it testable.

Its small project. Budget is $50.

tell me what tool you are familiar with and will be using.

Compétences : Génie Électrique, Electronique, Verilog / VHDL

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Concernant l'employeur :
( 3 commentaires ) surat, United States

Nº du projet : #1669767

4 freelance font une offre moyenne de $79 pour ce travail


Hello, Most DFT is used as a building block inside a system. Therefore I need to ask whether the DFT is top entity or it is part of a bigger project?

%bids___i_sum_sub_35% %project_currencyDetails_sign_sub_36% USD en 7 jours
(2 Commentaires)

Hi Employer, I have 11 years experience in VHDL coding and 2 years experience in Verilog coding. I am knowledgeable in tools like Xilinx ISE and Modelsim. Regards, Carmelo

%bids___i_sum_sub_35% %project_currencyDetails_sign_sub_36% USD en 3 jours
(0 Commentaires)

I can do this project too. Please let me know more details and then we can work on it.

%bids___i_sum_sub_35% %project_currencyDetails_sign_sub_36% USD en 5 jours
(0 Commentaires)

- I have 7 years of rich experience in DFT. I have implemented DFT on very complex SOCs (coded in verilog/vhdl) with very stringent DFT requirements. My experience includes scan (atpg), logic bist, memory bist, jtag im Plus

%bids___i_sum_sub_35% %project_currencyDetails_sign_sub_36% USD en 3 jours
(0 Commentaires)