Design an SPI interface for FPGA in Verilog or VHDL

I have an Altera DE2-115 evaluation board with a Cyclone 4 FPGA processor (EP4CE115F29C7). I need a HDL design either written in Verilog or VHDL that implements a SPI core. I want to transfer data between the FPGA evaluation board and a PIC24 microprocessor evaluation board from Microchip. The data consists only of a few bytes that are transferred in both directions approximately every second.

The HDL design must be written so that i can use it directly in Quartus II software by embedding the SPI core into a top level schematic file.

You should only make a bid if you are familiar with Quartus II and if you have the necessary hardware to test your SPI HDL design, or if you have so much experience with FPGA SPI that you are very confident that your design will work.

Compétences : Electronique, Logiciels Embarqués, Microcontrôleur

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Concernant l'employeur :
( 16 commentaires ) Uttwil, Switzerland

N° du projet : #1071662

Décerné à :


Could you, please describe the interface specifications you intended to use with SPI core? Thanks, akhachat

150 $ USD en 3 jours
(2 Commentaires)

I have created SPI interface for my work. I'll customize it for you.

49.99 $ USD en 2 jours
(1 Commentaire)

13 freelance font une offre moyenne de $196 pour ce travail


Hello, Please see your PMB for details. Thanks

150 $ USD en 14 jours
(5 Commentaires)

Hi, Please see the PMB.

150 $ USD en 10 jours
(1 Commentaire)

Hi I can do this as I am fairly comfortable with Quartus II, I have a Altera DE1 board with me with Cyclone 2 but I think I will be able to test my designs on it.. the only thing you would have to do at your end is p Plus

200 $ USD en 14 jours
(0 Commentaires)

Hi, I have done many Project on FPGA(verilog/VHDL). Plz check Pm...

250 $ USD en 15 jours
(0 Commentaires)

i can finish up this project in seven to eight days and can deliver you in synthesis able format. i am a post graduate in vlsi design so u can give me without any fear.

149 $ USD en 8 jours
(0 Commentaires)

HI, I work normally in VHDL under Quartus for Cyclon III and IV. NO PROBLEM AT ALL. thank you maurizio stefani

200 $ USD en 5 jours
(0 Commentaires)

Hi I am ASIC/FPGA engineer. I need more infomation(Fmax, SPI-timing, user logic timing,etc).

500 $ USD en 30 jours
(0 Commentaires)

[url removed, login to view] is an organization with qualified professional engineers aiming at providing satisfactory technical services to its world wide clients.

200 $ USD en 15 jours
(0 Commentaires)

I am ASIC/FPGA design engineer. I have worked in this project.

250 $ USD en 20 jours
(0 Commentaires)

i have worked on it ....would again enjoy to do it

150 $ USD en 10 jours
(0 Commentaires)

i designed interfaces before on both FPGA and microcontrollers

150 $ USD en 10 jours
(0 Commentaires)