Tic Tac Toe in VHDL with Nexys-A7-100T

I am looking for someone who can fix errors and complete my program. I was planning on using C code within the SDK within the vivado program to connect my two slave codes. I'm fine with using a master IP if need, if you can't figure out how to code in C within the SDK. I created two slave IPs.

Compétences : Génie Électrique, Electronique, FPGA, Microcontrôleur, Verilog / VHDL

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Concernant l'employeur :
( 0 commentaires ) Storrs, United States

Nº du projet : #22651848

3 freelance font une offre moyenne de $78 pour ce travail


Hello, i have read the details provided..please contact me to discuss more on the project deadline and some other few things

%bids___i_sum_sub_35% %project_currencyDetails_sign_sub_36% USD en 5 jours
(9 Commentaires)

I can fix your code. I am a developer and teacher in Vhdl/verilog. Besides, i have experience on sdk.

%bids___i_sum_sub_35% %project_currencyDetails_sign_sub_36% USD en 6 jours
(0 Commentaires)

Electronics Engineer with experience in large scale complex systems development with practicing in Verilog, SystemVerilog and Programming Firmware, C, C++. Let's Discuss further.

%bids___i_sum_sub_35% %project_currencyDetails_sign_sub_36% USD en 7 jours
(0 Commentaires)