We are interested in FPGA development. Our requirement is to take in a video stream in either DVI or HDMI. To decode the video data into RGB
values and scale the value of each with an 8 bit value.
This brightness value will be supplied on a 3 line interface consisting of clock,
data and update. The data is 24 bits shifted in on the rising edge of the clock line,
after all 24 bits are clocked in the update will pulse low.
After doing the scaling the RGB video data is then recombined with the control bits
(delayed if needed to account for scaling time) and then reassembled into
either HDMI or DVI.
A control pin will configure operation mode, low for HDMI and high for DVI.
Xilinx FPGA preferred ideally with internal configuration memory ....the XC3S50AN
would be the sort of part. Not sure if you can get the double data rate to
work in this part. Could be a BGA part if needed.
There will also be a few bits of logic which will be suppied as a circuit diagram.
This should be less than 20 flipflops and 30 gates using
about 8 i/o pins and running about 300KHz.
The design will need to support the six common formats of video screen formats....
as per Xilinx application note XAPP460 Table 2 on page 1.
The project is not urgent. We would produce a test PCB when you have a device
selected and a firm design. We would ship this to you for testing.
This is a provisional specification.
Please let me know if this project would be of interest to you.