We need a modification to an Ettus USRP SDR FPGA code. We have a working system and reference for a 1 TX and 1 RX system, using half of the USRP1, including the source files for the FPGA code and corresponding c library. We have working FGPA code for a 2 TX and 2 RX system, and but need about 15 lines of verilog code ported from the 1 TX and 1 RX system to the 2 TX and 2 RX system. Also, we need the working c libary in the transceiver (1 Tx and 1 RX) modified to support the 2 TX and 2 RX configuration, which should require about 20 - 40 lines of c code changes. All work can be completed remotely, and we would make available a reference 1TX and 1RX system (with all source code), and a development environment for the 2TX and 2RX system (where you could test your modified FGPA code and c code).
14 freelance font une offre moyenne de $1195 pour ce travail
Dear sir I have more than 10 years experience in digital design using FPGA, please check my profile also please message me so that we can discuss Best regards
Hi, I am a post graduate power electronics engineer and having very good experience in product design and development. I am excellent in embedded design & programming using pic, dspic controllers and MATLAB codding fo Plus
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HI, I have a rich experience of verilog development. I am waiting for your reply. thanks! Stay tuned, I'm still working on this proposal.
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