my company is going to build a website for the asic verification. we need a technical content writer who knows the Verilog, system Verilog,uvm and ovm industry subjects.
12 freelances font une offre moyenne de 7620 ₹ pour ce travail
Hi, I am a highly-skilled FPGA engineer with 6+ years experience and hundreds of FPGA/Verilog/VHDL projects using Xilinx/Altera FPGA Design Tools and Digital Logic Design using LogiSim/CEDAR. An FPGA/Verilog/VHDL Codem Plus
Hello! I am a graduate in Electronics and Instrumentation Engineering from BITS Pilani Goa Campus, and am currently working as a freelance CPU Design Engineer. I am enthusiastic about Computer Architecture, Process Plus
I have reviewed your bid request and I am very interested in your project. I was trained overseas and have an extensive customer service record so contact me so we can discuss further or begin. Relevant Skills and Exp Plus
More than 7 yrs of experience in verification usign SYSTEMVERILOG/UVM testbench. Developed lot of block level and subsystem level environments using UVM.
Hi, I have 5 years experience in the digital design field please contact me for more details, Regards, Mohamed
Hi, I hope you are doing well and enjoying digital design. I believe implementing a design right form modeling until verifying it on an FPGA is always a very special experience. Throughout my 3+ years of experie Plus
Master in Engineering, Electrical and Electronic Engineer, who is dynamic, reliable, resourceful, committed and organized with enthusiastic approach to succeed with a pleasant attitude. Possessing excellent analytical Plus
Greeting!. Yours work is one of the tasks that can be done very perfectly by us. We work within your budget, Within your deadline. We are highly experienced Post Graduate Engineers, IT, ITES, Software, Infrastructure P Plus
hello sir I have gone through your project and what interesting things I discovered is that the things and skills required in your project is of my comfort zone as we the technical group has launched our website YTCrea Plus
I am working in the ASIC industry. I have been working in Cadence for two years. The project is definitely in areas of my expertise. I am very familiar with Verilog, Systemverilog, ovm and uvm. This is my first bid Plus