Vlsi verilog fpga asicemplois

Passionné de cryptomonnaie depuis 2012 je souhaite me lancez dans l'ouverture d'une ferme de minage. Je suis déjà mineur de cryptomonnaie a mon domicile mais je souhaiterais développer cela. Je possède un local adapter pour cela , il me manque uniquement la trésorerie afin de pouvoir acheter des ASIC et donc augmenter la puissance de minage Je souhaite donc trouver 20000 euros qui seront rembourser en 10 x 2000 euros + un paiement de 2000 euros en tant qu'interet

conception des parties commande des systèmes industrielles (FPGA , Microcontrôleur , automate programmable industrielle , Arduino .....). conception des schémas électriques.

Nous avons la possibilité de produire des ASIC en quantité, nous avons une usine en chine, et nous voulons joindre la vague des miner de crypto monnaie .. Nous recherchons un passionné qui saura designer l'ASIC pour miner différente monnaie etc .. Merci

Je travaille sur la programmation d'une imprimante 3D sur Le FPGA, je voudrai avoir de l'aide, Mon projet consiste a Controller 3 moteur pas a pas pour dessiner sur un sol mobile avec un moteur au milieu pour envoyer de plastique fondu

Mission de vérification front end digital pour microélectronicien ayant une expérience en SystemC et/ou Specman. Le projet a lieu en région Rhône Alpes de septembre à décembre 2015;

Analogue ASIC layout webbase Small analogue circuits

Tracer using System verilog & UVM

MIPS ALU design

Altera FPGA PCIe card main chip: Altera Cyclone IV CGX functions: ADC/DAC, PCIe 1.1 x4, DDR2,

multipliers

I need redesing an stl (o do a new one from 0, as you want) for an asic miner. I want this with the measures of the image. If you want to do form 0, here are the principal measures (the out of this is 160mm, i need 200m)

...an ASIC miner board with customizable mining capabilities. The board should be able to mine Bitcoin using common software. Skills and experience required: - Strong knowledge of ASIC miner board design and development - Expertise in creating Gerber files for electronic circuit boards - Familiarity with Bitcoin mining and common mining software - Ability to customize mining capabilities based on specific requirements The project has a specific deadline of one week, so the freelancer should be able to complete the task within this timeframe. The ASIC miner board should have general software compatibility, meaning it can work with a variety of software options. If you have the necessary skills and experience, please bid on this project and provide examples of your p...

Title: Build ASIC Miner Project Requirements: - Budget: Between $1,000 and $5,000 - Specific Features: High Hash Rate - Hardware Components: Yes, I have specific brands/models in mind We are looking for an experienced professional who can build an ASIC miner according to our specifications. The ideal candidate should have the following skills and experience: Skills: - Expertise in ASIC miner design and development - Strong knowledge of cryptography and blockchain technology - Proficiency in hardware design and integration - Understanding of power efficiency optimization techniques Experience: - Previous experience in building ASIC miners with a high hash rate - Familiarity with specific brands/models of hardware components, such as [specific brands/models...

I am looking for an experienced FPGA developer to help me develop an IP core for signal processing using the Smartfusion2 FPGA. The desired functionality of the IP core is signal processing, and the required performance level is medium. Skills and Experience: - Strong knowledge and experience in FPGA development - Expertise in signal processing algorithms and techniques - Familiarity with the Smartfusion2 FPGA platform - Ability to optimize performance for medium-level requirements

VLSI design and implementation on Logisim, Modelsim, Magic ValSI layout tool and IRSIM

I am looking for a LabVIEW FPGA expert who can assist me in designing and implementing a data acquisition system using specific hardware. Hardware Requirements: - The candidate should have experience with the specific hardware that I have in mind for this project. Project Purpose: - The primary purpose of this LabVIEW FPGA project is data acquisition. Program Assistance: - I need assistance with creating the entire LabVIEW FPGA program for this project. Ideal Skills and Experience: - Proficiency in LabVIEW FPGA programming. - Experience in designing and implementing data acquisition systems. - Knowledge of the specific hardware that will be used for this project. - Strong problem-solving and troubleshooting skills. - Attention to detail and ability to meet ...

VLSI Project using Logisim, Magic layout and IRSIM.

I need a simple circuit using common hardware parts that measures the high width of a TTL pulse and if it exceeds 3 seconds a logic output is set high as an alarm. If the pulse becomes shorter than 3 seconds the logic output is set low so alarm is turned off. A 32768Hz clock is available. Maybe a ...parts that measures the high width of a TTL pulse and if it exceeds 3 seconds a logic output is set high as an alarm. If the pulse becomes shorter than 3 seconds the logic output is set low so alarm is turned off. A 32768Hz clock is available. Maybe a 74HC series binary counter might work. Or specify your own clock generator. We want simple 74HC logic, or 4000 logic. Not MCU and not FPGA. When we choose the circuit we will build it to confirm it works before award...

Develop a 4x4 multiplier. The multiplier uses a shift and add algorithm. The multiplier uses 2 phase clocking system (Using carry ripple adder) The inputs for the multiplier are A (A3, A2, A1, A0) and B (B3, B2, B1, B0), Reset and Start. The outputs for the multiplier are O (O7, O6, O5, O4, O3, O2, O1, O0), and Finish The operation of the multiplier is as follows 1. When Reset = 1 the system is reset 2. When start = 1 the following occurs a. Load A on the first phi1 b. Load B on the first phii1 c. After n cycles the output is stored in O and the Finish output is asserted d. There is no change to the output after subsequent cycles. -In this phase you are implement your project in (Magic.) Prepare a well organized and well written report that describes your design, and simulation...

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Project Title: NTT hardware implementation verilog I am looking for a freelancer who can help me with the implementation of a Radix-2 NTT hardware in Verilog. Requirements: - Strong experience in Verilog programming - Knowledge of Radix-2 NTT algorithm - Familiarity with cryptography and encryption techniques The ideal candidate should: - Have experience in FPGA or ASIC technology - Be able to suggest suitable FPGA or ASIC technology for the implementation - Understand the specific requirements of cryptography in the context of NTT implementation This project is focused on the implementation of a Radix-2 NTT hardware for the purpose of cryptography. If you have the necessary skills and experience, please submit your proposal.

I am looking for a freelancer who can assist me with the RTL implementation for my digital circuit design project. Requirements: - Experience in digital circuit design and RTL implementation - Familiarity with Verilog programming language - Ability to work with limited guidance and rough design ideas Skills and Experience: - Proficiency in Verilog programming language - Strong knowledge of digital circuit design and RTL implementation - Ability to interpret and work with rough design ideas - Attention to detail and ability to problem-solve If you have the skills and experience required for this project, please submit your proposal.

I am looking for an experienced Verilog coder to help me design a simple digital circuit. I have a rough idea of what I want the circuit to do, but I am open to suggestions and input from the freelancer. The ideal candidate should have experience in designing digital circuits using Verilog and be able to work with a simple level of complexity.

What is the target device for the custom firmware? DMA FPGA XILINIX 7 FPGA / XC7K325T FPGA high-performance chips I am looking for an experienced freelancer to develop custom firmware for a specific DMA card model, PCILeech (Terminator Z1 specifically) + other squirrel PCILeech cards. The firmware needs to be compatible with EAC, BE, Faceit, and Vanguard anti-cheats. It has to be able to disguise my DMA device exactly like another device with the same config space and return the same buffers as the second device we are trying to emulate, basically I need it to act and look exactly like another PCIe device. Requirements and Features: - I am open to suggestions for specific requirements and features for the firmware. - The firmware should be optimized for gaming purpo...

FPGA Dma board Custom Firmware Im looking to get a firmware for my dma card that bypasses all anti cheats and is fully emulated. Details: Artix 7 fpga dma card Example (link):

FPGA Dma board Custom Firmware Im looking to get a firmware for my dma card that bypasses all anti cheats and is fully emulated. Details: Artix 7 fpga dma card Example (link):

Description: Create a Hardware-Software Codesign version of the k-mean clustering algorithm K-means clustering is a popular data mining algorithm that partitions n samples into k clusters (note: the k-nearest neighbor classifier algorithm used in machine learning can leverage the cluster centers produced by the k-means clustering algorithm). The problem is in general NP-hard but heuristic algorithms have been developed that quickly converge to a local optimum solution. We will consider one of those algorithms in this project. I have provided a C code version of the k-means clustering algorithm, and a Vivado block diagram and memory layout (explained below) that you will use as a starting point. You will need to study the C version and then decide which components to implement as a VHDL mod...

...is experienced in implementing Ethernet on the ZCU216 Ultrascale+ Xilinx RFSoC board using Petalinux. The ideal candidate should have the following skills and experience: - Strong knowledge and experience in Ethernet protocols, such as Ethernet/IP, Ethernet TCP/IP, and Ethernet UDP - Familiarity with the ZCU216 Ultrascale+ Xilinx RFSoC board and Petalinux - Experience in implementing Ethernet on FPGA-based systems - Ability to work with constraints and specific requirements related to Ethernet implementation - Understanding of networking principles and protocols -Ability to make ppt slides of task done in an orderly step manner. I can also provide you with some prior information regarding our task and some past work done on this ,which will make it even more easier for you. Su...

I am looking for a Verilog programmer who can assist me with designing circuits. Although I have a rough idea of the type of circuit I want, I am open to suggestions and creative input. The ideal candidate should have experience in Verilog programming and be able to design circuits efficiently and accurately. This project does not have a specific timeframe mentioned.

I am looking for someone who is good with verilog and system veriliog who can do the following : The idea of this application is to equifill rectangles in individual rows based on comparing strip heights and program heights. The design should use a decoder. for example : if you have row of height strip 8, it is checking 9, and 10 so it will compare 8 and 9 and then it will compare the minimum of 8 and 9 with 10. A table on page 2 of the attached document explains these comparisons with further examples. But, each time the program should only perform 3 comparisons. The program needs to use 8 clock cycles strictly. It needs to be a design that can be optimized. It needs to fit in the top level module (M216A_TopModule (2).v) that I have attached and it needs to work for all cases in...

I have a SPARTAN 3 FPGA board and I need a project in C++ language that allows data to be sent to LEDs from the switches. The C++ project should be simple without calls to advanced libraries, understandable and with comments for each line of the program as much as possible, I have a base code file to start with that. The purpose is so that I can understand and add my own code later. For more details and related files, please send me a private message.

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using Artix 7 implement Master UFS protocol design for the UFS Host device, Feel free to contact who's have experince on Stroage's(emmc, ufs, nand e.t.c) Skills required : Verilog , VHDL , C

I am looking for a skilled FPGA developer who can integrate the IMX586/Equivalent camera with the Artix 7 FPGA( XC7A35T). The desired output of this integration is both image processing and video processing. The resolution and frame rate requirements are not specific, but I have a general idea and I am open to suggestions. In addition to the integration, I would like to incorporate additional feature to overlay time, GPS, and compass data in the image/video and send that to the LSM7002M RF IC and to BL618. Additional engineer will be provided for BL618 integration Ideal skills and experience for this project include: - Proficiency in FPGA development and integration - Experience with xilinx FPGA - Knowledge of image and video processing - Ability to imple...

I am looking for a freelance developer to help me with a project involving writing to a LCD 16x2 display on a basys 1 FPGA with an i2c interface (PCF8574A). I would like the programmer to use Verilog, but I don't have experience with FPGA programming and I am open to suggestions for content and/or functionality for the display. If you have experience with FPGA programming and think you are a good fit for this project, I'd love to hear from you!

***PROJECT ONLY FOR EXPERIENCED DEVS*** Hello, I am looking for skilled programmers who can program LimeSDR Mini v2.2 . The goal is to make the LSM7002M pair with other LSM7002M and exchange...other LSM7002M and exchange data in the following ways: (I) Modulation – AM, FM, 4FSK (DMR) without AES (ii) AM, FM, 4FSK (DMR) with (AES 256 bits) (iii) Narrowband Waveform (25 kHz) for voice communication (iv) Data Rate atleast 1 Mbps for transfer of text messages,image transfer etc. (v) Interfacing the FPGA with external microcontroller (BL618/Equivalent). (vi) Making the FPGA getting into sleep mode during non operation and wake up on interupt from the external microcontroller. The FPGA will receive data from the external microcontroller which is linked with micro...

UART Transceiver to receive input and transmit output to and from text file. The UART transceiver has start and stop bits, no parity and has configurable baud rate. Receiver will receive a 45-bit input from a text file and placed in a fifo buffer. Input will be test vectors which will be operands for the unit in which it will be processed. The unit is already done. Fifo buffer will preferably be a DPRAM (or any type of RAM available in IPExpress that will be suitable). The unit will then get to instantiate the inputs needed from the fifo buffer. The unit will produce 21-bit output for each operation. The 21-bit output will be stored to another fifo buffer. The transmitter will then get the 21-bit output from the fifo buffer and will transmit it to an output text file where all output...

I am looking for a freelancer who can design an SDI HDMI system using Xilinx and Artix FPGA Device. The project requires the following: - The desired output resolution for the SDI HDMI design is HD-SDI and 3G-SDI. - The client specifically wants to use an Artix FPGA Device for the design. - The key functionality required for the design is video processing. Ideal Skills and Experience: - Proficiency in Xilinx and FPGA design. - Experience in designing SDI HDMI systems. - Strong knowledge of video processing technologies. - Familiarity with Artix FPGA Devices. If you have the necessary skills and experience, please bid on the project.

Need an expert who can design a custom Application Specific Integrated Circuit (ASIC) implementation of an N x N array multiplier.

Need an expert who can design a custom Application Specific Integrated Circuit (ASIC) implementation of an N x N array multiplier.

Need an expert who can design a custom Application Specific Integrated Circuit (ASIC) implementation of an N x N array multiplier.

I am looking for a freelancer to create a function using Verilog that will determine falls and output them in an LED display. The function will be used with the iCE40 UltraPlus and LSM6DSOX. Requirements: - The function must be written in Verilog. - The freelancer should be familiar with the iCE40 UltraPlus and LSM6DSOX. Skills and Experience: - Strong knowledge and experience in Verilog programming. - Familiarity with the iCE40 UltraPlus and LSM6DSOX is highly preferred. I already have code for the LSM6DSOX and iCE40 UltraPlus 5K communicate through SPI. You are using LSM6DSOX (3D accelerometer and 3D gyroscope) and iCE40 UltraPlus 5K and the software lattice radiant 2023 to finish this project. Basically, all you need to do is to create a function to determine f...

I am looking for someone who can provide me with an FPGA project in Verilog within a day, which should include the use of peripherals. Here are the details: Specific Peripherals: - UART - SPI - I2C Requirements and Constraints: - No specific requirements or constraints for the FPGA project Target Application: - Any application, such as data processing, signal processing, or control systems Ideal Skills and Experience: - Proficiency in Verilog and FPGA development - Experience with integrating peripherals into FPGA projects - Knowledge of UART, SPI, and I2C protocols If you have a Verilog FPGA project that includes the use of peripherals, please reach out to me. Thank you!

I am in need of an intermediate FPGA VHDL designer who can assist me with designing a small module. This project requires someone with experience and expertise in VHDL programming for FPGAs. Skills and Experience: - Proficiency in VHDL programming for FPGAs - Experience with designing small modules - Strong understanding of FPGA architecture and design principles The project has a tight deadline, with completion expected within the next 1-2 weeks. Therefore, it is important for the freelancer to be able to work efficiently and deliver high-quality work within this timeframe. If you have the necessary skills and experience in FPGA VHDL design, and are able to meet the project requirements within the specified timeframe, I encourage you to apply for this project.

I am looking for someone to program an FPGA to execute a maximum ratio combining algorithm. The input signal format I need is digital, so there will be no analog signal involved. I don’t have specific FPGA model in mind, so I am open to any model that can work well with this project. I need the project to lead to a prototype outcome so I have a working model to then be able to make other changes as needed.

I'm looking for an experienced engineer to reprogram my Intel Cyclone V FPGA with existing code to enable it to perform signal processing functions. The code itself is already written and I'd like the engineer to take that code and use it to program my FPGA. This project requires an in-depth knowledge of FPGA technology and experience with the reprogramming process. I'm confident that the right person can complete this task effectively and efficiently. If you believe you are up to the challenge, I would love to hear from you and discuss the details of the project.

I would like to implement a numerical interpolation in Verilog, more information will be supplied for the candidate

KP4-FEC ENCODER DECODER RS (544,514) including documentation and explanation. Verilog files and simple testbench to prove the run on Quartus II. 514 data symbols per codeword 544 data plus parity symbols per codeword Codeword size = 10 * 544 = 5440 bits Correcting capability up to 15 symbols within a codeword PAM4 modulation

I need a simple Verilog code (that it's not too complex, understandable for a begginer) written in Vivado which will connect camera OV7670 to board Nexys 4DDR and output video on a monitor through the VGA port. I will also need the .xdc completed based on the inputs and outputs used (constraints file) and an explanation for the code. I am looking for someone who can complete this project in 1 - 2 months. Thank you for your help!

I am looking for someone with a programmer to program an Actel APA300PQ208I FPGA. I have the program but do not have the required programmer. If you have the correct programmer and are familiar with this device, I look forward to viewing your proposal.