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    326 project vlsi design travaux trouvés au tarif de EUR

    Objective is to develop one VLSI Architecture and Verilog code for Algorithm-1(2D-SRNCP) [1] with Derivative variance correlation map for given two 256*256 synthesized & one SAR real time image. Implementation should be done in Matlab@Simulink and Xilinx@ System Generator environment. Implement above algorithm on FPGA Board & GPU. Simulation results

    €124 (Avg Bid)
    €124 Offre moyenne
    1 offres

    Simple CMOS VLSI Design Project (Power, Sequential Timing, Logic Families, Wires & Memory) Look at the problems in: [se connecter pour voir l'URL] WILL PAY GENEROUSLY. $$$ Project Description is: [se connecter pour voir l'URL] Reference Literature: CMOS VLSI Design Happy Bidding

    €9 - €177
    €9 - €177
    0 offres

    Simple CMOS VLSI Design Project (Power, Sequential Timing, Logic Families, Wires & Memory) MUST BE ACCURATE AND CORRECT. WILL PAY GENEROUSLY. $$$ Project Description is: [se connecter pour voir l'URL] Reference Literature: CMOS VLSI Design Happy Bidding

    €244 (Avg Bid)
    €244 Offre moyenne
    2 offres

    Simple CMOS VLSI Design Project (Power, Sequential Timing, Logic Families, Wires & Memory) MUST BE ACCURATE AND CORRECT. WILL PAY GENEROUSLY. $$$ Project Description is: [se connecter pour voir l'URL] Reference Literature: CMOS VLSI Design Happy Bidding

    €137 (Avg Bid)
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    1 offres

    I have a Introduction to VLSI Design school course project. I have done most of topics but need to ask a questions and bugs about the project. Need someone to help on this very basic project. Freelancer should known the base sturecture of VLSI lecture. Freelancer either can be student, graduat, postgraduate or more.

    €37 (Avg Bid)
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    8 offres
    VLSI small Project S'est terminé left

    i have some work related to VLSI and i need someone who can do it in efficient way. Should have good command in designing logic circuit designs. should have good knowledge of CMOS, NMOS transistors etc.

    €24 (Avg Bid)
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    9 offres
    abiramiamanm S'est terminé left

    vlsi coding using QUARTUS II software FPGA

    €17 (Avg Bid)
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    3 offres

    I have 1864 technical words. I want to remove the Plagiarism of this work. Current Plagiarism is 82%. I want plagiarism <20%. I have checked plagiarism at turnitin software. I will check final work plagiarism also at turnitin software. Please the bid only those candidates who can work in my given budget. My budget is 200 (INR) for this work. I attached the same file in the attachments.

    €4 / hr (Avg Bid)
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    17 offres

    I need someone to create video tutorials for VLSI design from basics to advanced concepts. Advanced Digital Design Concepts CMOS Logic fundamentals RTL Design with Verilog HDL's ASIC Design Systhesis Concepts ASIC Design Stratagies Static Timing Analysis Low power design implementation Design and power Constraints Perl/Shell Scripting ...

    €440 (Avg Bid)
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    7 offres
    Website content developement S'est terminé left

    looking for freelancer to develop web content for VLSI training institute. Following tabs required. Home VLSI Courses Offered Custom Layout Design Physical Design Design Verification DFT Placements About us Contact us

    €95 (Avg Bid)
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    12 offres

    Hi, I have a Flash 6 bits ADC, would like to attempt to make a 12 bits ADC, can you help me to achieve it ?

    €110 (Avg Bid)
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    16 offres

    This is pavan. I am from the VLSI industry. I need a technical writer to explain 3 subjects(digital electronics, Verilog, and VHDL).

    €110 (Avg Bid)
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    17 offres
    Shell Scripting Engineer S'est terminé left

    I need to develop shell script for EDA Tool in VLSI domain

    €74 (Avg Bid)
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    12 offres

    Front End VLSI Design engineer Part Time in Bangalore Looking for expert FPGA Design engineer with RTL Design [Verilog] Proven track record of designing, developing, prototyping, and testing high speed FPGA designs Experience in Verilog programming & experience with Xilinx devices and development tools Design Simulation experience [Modelsim] Candidate

    €154 (Avg Bid)
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    12 offres

    Front End VLSI Design engineer Part Time in Bangalore Looking for expert FPGA Design engineer with RTL Design [Verilog] Proven track record of designing, developing, prototyping, and testing high speed FPGA designs Experience in Verilog programming & experience with Xilinx devices and development tools Design Simulation experience [Modelsim] Candidate

    €131 (Avg Bid)
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    4 offres
    VLSI EDA Cadence S'est terminé left

    RISC-V CPU chip high performance low power -- run EDA tools to generate GDSII synthesis and place and route

    €33 / hr (Avg Bid)
    €33 / hr Offre moyenne
    14 offres

    Our project relates to vs1005 (All in one audio player on a chip) [se connecter pour voir l'URL] by [se connecter pour voir l'URL] in combination with the developer board. Programs are written using VLSI Solution's Integrated Development Environment VSIDE [se connecter pour voir l'URL] We are coding a VS1005 and want to use a stepper motor

    €115 (Avg Bid)
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    3 offres

    An existing algorithm is available, apply it and get the results. Then make minor changes in it for improvement and get the results

    €54 (Avg Bid)
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    5 offres
    SD Pro Solutions S'est terminé left

    ...Engineering and Educational Project provider for Diploma, Engineering (Under Graduate, Post graduates) and Research Scholars. SD Pro was established in the year 2013 for Project Development, Course Designing, Training, and placement guidance, based at South India. SD Pro providers Training and Projects in Embedded systems, VLSI, Matlab, Power systems, Power

    €254 (Avg Bid)
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    Please find the document in the attachments. Solve the problems step by step with the given data/parameters and please mention all the steps clearly and specify the units for each and every step correctly and make sure the calculation is perfect. For the first question please draw the circuit diagram on a paper and attach it with the solutions and please make sure all the solutions are in WORD doc...

    €78 (Avg Bid)
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    5 offres

    Based on my current design of CDS active pixel, I'd like to have it extended in order to make an implementation of CMOS Image Sensors of array 512x512 at least. You need to make a proof of concept and make simulations of it. We'll use Cadence Virtuoso 6.17

    €196 (Avg Bid)
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    6 offres
    Data Collection S'est terminé left

    ...data. [se connecter pour voir l'URL] If you want to be sure and on the right page to proceed with this project, you can do a sample of 3 colleges - NIT, IIT and any local college and ping me for a check so we can ensure that you are on the right track. • Go to the website of the mentioned

    €116 (Avg Bid)
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    45 offres
    VLSI Trainer S'est terminé left

    We are looking for an experienced Freelancer trainer who can train on VLSI in Bangalore. The curriculum will be provided by the company for the same.

    €681 (Avg Bid)
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    11 offres

    Hello, I have made a SAR 8 bits binairy coded ADC using method of 2 steps Successive Approximation, but it is a bit buggy. I need very experienced engineer in this field, otherwise it would just be loosing time. The simulation must be done in Cadence Virtuoso 6.x Thanks !

    €35 (Avg Bid)
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    2 offres

    Design and optimization of low power VLSI circuits for Leakage power reduction using Clock Gating with GSA

    €173 (Avg Bid)
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    4 offres

    ...tracking device for a specific application. I am seeking a solution that is an android and IOS application that is designed to track and locate a sensor (IOT, GPS, RF or other VLSI) technology that is embedded within a projectile that is no larger than 1.68-inches (42.7mm) in width, height and length. The IOS and Android applications should be able to

    €282 (Avg Bid)
    LDN
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    20 offres
    TCL automation VLSI S'est terminé left

    I want to parse a log file and use regexp to filter some patterns and put them in output log file. I have the script. 1- put the -p and -ig inside text files and feed it to code. like this: [se connecter pour voir l'URL] -i [se connecter pour voir l'URL] -o [se connecter pour voir l'URL] -p [se connecter pour voir l'URL] -ig [se connecter pour voir l'URL] [se connecter po...

    €96 (Avg Bid)
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    5 offres

    Design and optimization of low power VLSI circuits for Leakage power reduction using Clock Gating with GSA

    €163 (Avg Bid)
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    7 offres

    Project description is under: [se connecter pour voir l'URL] Will provide a good reference as well.

    €32 (Avg Bid)
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    5 offres

    Sequential Circuit Design Look at the project description, zip files have the actual images. Also attached a reference.

    €30 (Avg Bid)
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    5 offres

    Sequential Circuit Design Look at the project description, zip files have the actual images. Also attached a reference.

    €13 - €22 / hr
    €13 - €22 / hr
    0 offres
    VLSI coding language S'est terminé left

    I need help in VLSI coding language, micro controller , C++ and C

    €375 (Avg Bid)
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    8 offres
    Vlsi project on excel S'est terminé left

    Vlsi project on excel

    €20 (Avg Bid)
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    4 offres
    magic VLSi S'est terminé left

    Sketch a transis...widths to achieve ratio of 1(i.e. equal rising and falling resistances) 2- Use Magic VLSI layout tool to Design your layout of the sized design then use irsim to simulate your design (all combinations of input A,B,C). The report should include the following.  Design document  Testing results  Source code and layout

    €35 (Avg Bid)
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    5 offres
    VLSI homework S'est terminé left

    everything is clear in the PDF .................................................................................................................................................................................regards

    €44 (Avg Bid)
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    1 offres

    i need 3 to 4 papers review for the paper with brief explanation which is related to VLSI electronics

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    2 offres

    Build a basic building block of the Carry-Skip adder and test it for functionality in LTSpice. Description is in: [se connecter pour voir l'URL] Reference: [se connecter pour voir l'URL]

    €25 (Avg Bid)
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    9 offres

    Aim is to design a successive approximation register based analog to digital converter using cadence tool (any vlsi back end tool)

    €846 (Avg Bid)
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    8 offres
    Logo Design S'est terminé left

    ... SBL TECHNOLOGIES is a proven semiconductor and embedded design house in India, with deep focus and network in Indian Defence and production agencies. Setup by an experienced team of engineers from the industry to carry-out research, design, development and manufacturing in the field of VLSI and Embedded systems. PCB services from the initial stage

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    20 offres

    VLSI developer expertise enhanced in optimization concepts are required

    €454 (Avg Bid)
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    7 offres

    ...need a project suggestion for a masters project in VLSI testing and verification using Synopsis EDA tools for sequential circuits, because I have to submit a project proposal. Once a project suggestion seems acceptable, I will need help in finishing the project with desired outputs and compare the same with FPGA implementation. By bid for project...

    €525 (Avg Bid)
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    9 offres
    Vlsi project S'est terminé left

    I need some one has background about VLSI

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    Need Help in project S'est terminé left

    I need help in my company project (more details will be share with shortlisted candidate) You have to be very good in MIPS assembly language RTL, verilog, and basics VLSI technology to be shortlist you have to solve one MIPS Asm. question (attached below) as soon as possible.

    €860 (Avg Bid)
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    I am going to do my research so I need useful research ideas in electronics, electrical, IT domains and those who have research ideas in VLSI , Embedded systems, Finfet technology, Drones bid me.

    €58 (Avg Bid)
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    14 offres

    Multiplier cell design with the application of 8X8 multiplier, related to VLSI design (very large scale integration). required : some report corrections in chapter 1 and 2 regarding the references and report writing. I have a attached a copy of the report and a paper specifying the corrections.

    €19 (Avg Bid)
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    6 offres
    Suggest a topic S'est terminé left

    Looking for project topics in VLSI testing and verification using Synopsis EDA tools and TETRAMAX for sequential circuits. Once a topic has been selected, I would need help in finishing the project with desired outputs. Finally, I would also need an explanation of the functioning after completing the project.

    €374 (Avg Bid)
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    9 offres
    MULTIPLIER CELL DESIGN S'est terminé left

    Multiplier cell design with the application of 8X8 multiplier, related to VLSI design (very large scale integration). required : some report corrections in chapter 1 and 2 regarding the references and report writing. I have a attached a copy of the report and a paper specifying the corrections.

    €20 (Avg Bid)
    €20 Offre moyenne
    4 offres