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    1,778 fpga programmer freelancer travaux trouvés au tarif de EUR

    Je travaille sur la programmation d'une imprimante 3D sur Le FPGA, je voudrai avoir de l'aide, Mon projet consiste a Controller 3 moteur pas a pas pour dessiner sur un sol mobile avec un moteur au milieu pour envoyer de plastique fondu

    €32 - €269
    €32 - €269
    0 offres
    Altera FPGA PCIe card S'est terminé left

    Altera FPGA PCIe card main chip: Altera Cyclone IV CGX functions: ADC/DAC, PCIe 1.1 x4, DDR2,

    €653 - €1306
    €653 - €1306
    0 offres
    FPGA design S'est terminé left

    multipliers

    €241 (Avg Bid)
    €241 Offre moyenne
    1 offres

    Hey, I have a project that needs to be done in Verilog and Vivado and I'll share details to anyone interested.

    €22 (Avg Bid)
    €22 Offre moyenne
    8 offres
    SERDES RTL DESIGN 5 jours left

    ...connected to a PHY(PMA) IP, encoding the data with 8b10 protocol and then transmitting (no receiving) the data out through the PMA, 5Gbps. The data will be received by a Xilinx FPGA GTH Transceiver and then decoded. Therefore the PCS logics shall be compatible with the GTH Transceiver. Your tasks are 1. Write the PCS RTL code 2. Provide a compatible GTH

    €50 / hr (Avg Bid)
    €50 / hr Offre moyenne
    9 offres

    Design and development of non-invasive medical electronics devices that support and ...electronics devices that support and aid medical professionals in data acquisition and communication with expertise on processor/operating system/testing/system validation, FPGA design, integration of medical sensors, porting, middleware and application development.

    €650 (Avg Bid)
    €650 Offre moyenne
    4 offres

    Hi Loi L., I noticed your profile and would like to offer you my project. =================== The details : - my profile : fpga hobbyist newbie / singapore / currently working in a non-technology industry - hardware : - board : DE10-Lite MAX10 10M50DAF484C7G - monitor : HP Compaq LA2205wg, VGA mode 1680x1050-60Hz - OS : Linux distro (Linux

    €44 / hr (Avg Bid)
    €44 / hr Offre moyenne
    1 offres

    i have attached the document below. And i need this on 21st of october.

    €104 (Avg Bid)
    €104 Offre moyenne
    7 offres

    ...algorithms required in LabVIEW FPGA. The same have to be ported to VHDL and be integrated before programming the Xilinx V6 FPGA on the transmitter. Complete hardware and many of the software blocks in VHDL are already built by our team. The requirement is urgent. Entire work to be completed in 2 - 3 weeks. Any freelancer with experience in integrating

    €750 (Avg Bid)
    Local
    €750 Offre moyenne
    11 offres

    Need an expert in xilinx vivado Projects are based on digital systems on topics such as Multiplexers Flip flops registers Counters Clock dividers Please contact for project instructions and further details

    €117 (Avg Bid)
    €117 Offre moyenne
    9 offres

    I have my working model of neural network. I want to develop an accelerator on FPGA and show improvement in power.

    €458 (Avg Bid)
    €458 Offre moyenne
    28 offres

    ...Video Production Landscape Design Online Writing Financial Analysis Drafting Package Design User Experience Design Moving Swift Autodesk Inventor Tattoo Design Call Center FPGA Handyman Microsoft SQL Server Digital Marketing Wikipedia Zbrush Carpentry Book Artist Procurement Database Development Raspberry Pi Wix VB.NET Sketching Email Developer Network

    €84 (Avg Bid)
    À la une
    €84 Offre moyenne
    15 offres

    We are looking for someone who is very good with high speed digital layouts. The application is an Ethernet to digital audio motherboard. A daughter card with an Zynq FPGA/processor will install on this motherboard, and the motherboard will install onto a DAC board. There is a development board for this daughter card already. So this motherboard will

    €1567 (Avg Bid)
    €1567 Offre moyenne
    18 offres
    Labview MyRIO2 S'est terminé left

    ...in using MyRIO, MyRIO FPGA and MyRIO web services (Fig1 and 2). The project steps are explained as below: 1- The MyRIO should capture a signal (can be anything) with the sampling frequency of 5KHz. 2- Eleven (11) seconds of the signal must be captured. 3- I will provide you with two (2) MATLAB codes that must be run by MyRIO FPGA to analyse the captured

    €125 (Avg Bid)
    €125 Offre moyenne
    3 offres
    Distance using FPGA S'est terminé left

    I work in the Electrical Engineering Field. The project is to create a distance measuring program using verilog. I will be using Basys 3 ( FPGA) and an Ultrasonic sensor ( HC-SR04). The idea is to measure the gap between two vehicles. The sensor will be placed in the front of a toy car and used to measure the gap instantaneously and also save that data

    €102 (Avg Bid)
    €102 Offre moyenne
    21 offres

    I would like to discuss with freelancers having strong expertise in programming languages like VHDL, Verilog, Matlab, embedded C Please reach out to me. Engineering B.Tech. is must

    €14 / hr (Avg Bid)
    €14 / hr Offre moyenne
    30 offres

    I need someone to modify the ccminer software. So it can communicate with FPGAs instead GPUs. It needs to work with both usb and pcie. I'm not asking for algorithm programming, I'm not asking for bitstreams. Just modifying the mining app ccminer so it works with FPGAs.

    €572 (Avg Bid)
    €572 Offre moyenne
    12 offres

    Hi guys, I've done a simple design to test the SRAM of Digilent Cmod A7 FPGA board. This is how it works: Using a terminal through UART, I send the input data and address to the SRAM. Then I send address where to read, and I get back the data previously written. Everything works OK except the controller. I need someone to review my design and fix

    €17 (Avg Bid)
    €17 Offre moyenne
    6 offres
    FPGA craze S'est terminé left

    coding of bitstreams, software licensing, imbedded commission

    €2065 (Avg Bid)
    €2065 Offre moyenne
    18 offres
    LabVIEW MyRIO Project -- 2 S'est terminé left

    ...in using MyRIO, MyRIO FPGA and MyRIO web services (Fig1 and 2). The project steps are explained as below: 1- The MyRIO should capture a signal (can be anything) with the sampling frequency of 5KHz. 2- Eleven (11) seconds of the signal must be captured. 3- I will provide you with two (2) MATLAB codes that must be run by MyRIO FPGA to analyse the captured

    €124 (Avg Bid)
    €124 Offre moyenne
    8 offres

    Any encryption code (AES/RSA) written in VHDL/Verilog in Quartus II for fpga board stratix IV. Please contact for more details.

    €29 (Avg Bid)
    €29 Offre moyenne
    3 offres
    FPGA Project I2S to SPI S'est terminé left

    Project target is to have a FPGA to communicate with two I2S codecs and to provide a SPI slave connection conveying the I2S data to and from a local MCU. Testing scripts and test timings for the Altera Quartus environment are required. For the proper testing of the project deliverables, test scripts and test timings need to be created and relevant

    €184 (Avg Bid)
    €184 Offre moyenne
    3 offres
    LabVIEW MyRIO Project S'est terminé left

    ...in using MyRIO, MyRIO FPGA and MyRIO web services (Fig1 and 2). The project steps are explained as below: 1- The MyRIO should capture a signal (can be anything) with the sampling frequency of 5KHz. 2- Eleven (11) seconds of the signal must be captured. 3- I will provide you with two (2) MATLAB codes that must be run by MyRIO FPGA to analyse the captured

    €132 (Avg Bid)
    €132 Offre moyenne
    4 offres

    ...complete this project. They both have sample projects for HDMI in and HDMI out. What I'm trying to accomplish is have: 1) PC->HDMI->FPGA->HDMI->Monitor 2) PC->USB-> FPGA 3) The PC will send information to the FPGA and create an overlay on the monitor. This software on the PC could be coded in C++ or C. Example, DrawText(x, y, "Truck #19 ready f...

    €314 (Avg Bid)
    €314 Offre moyenne
    7 offres
    DSP Firmware Engineer S'est terminé left

    We are looking for DSP Firmware Engineer who has specialized in algorithms' performance optimization for DSP/FPGA based on VLIW architecture.

    €9 / hr (Avg Bid)
    €9 / hr Offre moyenne
    2 offres
    Video converter S'est terminé left

    I am looking to create hardware that will convert HDMI to NDI (Network Device Interface) I need both hardware and [se connecter pour voir l'URL] is no set date when I need this by but w...HDMI to NDI (Network Device Interface) I need both hardware and [se connecter pour voir l'URL] is no set date when I need this by but would like it soon. There is an sdk for the conversion by fpga...

    €1185 (Avg Bid)
    €1185 Offre moyenne
    4 offres
    SERDES design on FPGA S'est terminé left

    ...sent out of the FPGA chip through a single pin... Part 2 ...The serial transmission from part 1 is captured and converted to parallel data before being stored in another memory location( as 16 locations of 8-bits). The data in this memory should match with the data in memory in Part 1. Both parts are to be implemented in the same FPGA ....The serial

    €131 (Avg Bid)
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    22 offres

    I am building a tech blog about FPGA crypto mining. I need someone able to write tech articles, based on my request, about FPGA crypto mining. This is NOT something you can search on google and learn and write. Requirements: 1) You MUST have VERY GOOD knowledge about FPGAs 2) You MUST have VERY GOOD knowledge about crypto mining 3) You MUST be english/american

    €75 (Avg Bid)
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    17 offres
    FPGA/HPS Linux SD Card Image S'est terminé left

    I have a DE1-SoC FPGA board. I need an image build with a Linux installation (doesn't really matter) and the linux-socfpga kernel; however, the device tree blob on the installation must recognize the onboard FPGA peripherals, especially the onboard ADC. The goal is to have a working Linux image file, which when burned to an SD card would load Linux

    €130 (Avg Bid)
    €130 Offre moyenne
    6 offres
    Read data sensor S'est terminé left

    Read data of sensor on FPGA Xillinx. More details via messenger Freelancer.com with full requirements.

    €120 (Avg Bid)
    €120 Offre moyenne
    16 offres

    Front End VLSI Design engineer Part Time in Bangalore Looking for expert FPGA Design engineer with RTL Design [Verilog] Proven track record of designing, developing, prototyping, and testing high speed FPGA designs Experience in Verilog programming & experience with Xilinx devices and development tools Design Simulation experience [Modelsim] Candidate

    €153 (Avg Bid)
    €153 Offre moyenne
    12 offres

    Front End VLSI Design engineer Part Time in Bangalore Looking for expert FPGA Design engineer with RTL Design [Verilog] Proven track record of designing, developing, prototyping, and testing high speed FPGA designs Experience in Verilog programming & experience with Xilinx devices and development tools Design Simulation experience [Modelsim] Candidate

    €130 (Avg Bid)
    €130 Offre moyenne
    4 offres

    Needs to hire 2 Freelancers We are looking for designer to design Video object tracking : 1- CPU, CUDA based or FPGA accelerated algorithm . 2- Multi-target Detection/ tracking . 3- Moving object detection . 4- High accuracy , auto scaling , occlusion recovering . 5- fixed camera or moving camera. 6- Image Stabilization . 7- Move on Move tracking

    €1088 (Avg Bid)
    €1088 Offre moyenne
    21 offres

    Diseñar un procesador que configure el SPI con el módulo nrf24l01, y luego mandar mensajes en radio frecuencia entre dos módulos nrf24l01

    €401 (Avg Bid)
    €401 Offre moyenne
    4 offres

    Diseñar un procesador que configure el SPI con el módulo nrf24l01, y luego mandar mensajes en radio frecuencia entre dos módulos nrf24l01

    €227 (Avg Bid)
    €227 Offre moyenne
    2 offres

    We are looking for someone with engineering background, preferably knowledge in FPGA related stuff to translate some tehnical documents. Google translate is not acceptable.

    €52 (Avg Bid)
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    26 offres
    FPGA Development Training S'est terminé left

    Looking for a mentor in advanced FPGA development using Altera Max 10 FPGA board specifically.

    €17 / hr (Avg Bid)
    €17 / hr Offre moyenne
    9 offres

    1. Identify a good value and properly sized CPLD/FPGA and toolset (toolset needs to be relatively easy to configure) to accommodate the required functionality. 2. Develop the CPLD/FPGA code. The device needs to take as inputs a set of states (from a microcontroller so either as an I2C command or as a 3 digital input code, along with 3 digital inputs

    €109 (Avg Bid)
    €109 Offre moyenne
    17 offres

    I need a network of thermostats that send data over Power Line Communication to a router where it is then sent over Ethernet and stored on a server. I will need to have software to access and display the data in graph form. There are other components that I need that are not so detailed. I need consulting for the design and components to use for both the thermostats and the modem/router as well a...

    €125 (Avg Bid)
    €125 Offre moyenne
    7 offres
    PCB design S'est terminé left

    ...square or rectangular with maximum dimensions of 9.5 cm x 9.5 cm. The PCB should hold 5 of the following boards: [se connecter pour voir l'URL] There should be some minimal interconnection between the 5 boards (more details to be provided). The USB ports on each of the boards will be used only for programming

    €346 (Avg Bid)
    €346 Offre moyenne
    21 offres

    I am looking for Xilinx SDx OpenCL expert, who can convert github miner project into FPGA hex file in Xilinx SDx. Don't bid if you do not have experience.

    €4347 (Avg Bid)
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    8 offres
    FPGA Project S'est terminé left

    Reading of sensor via PMOD on FPGA Xillinx. More details via messenger Freelancer.com with full requirements.

    €137 (Avg Bid)
    €137 Offre moyenne
    3 offres

    I need to implement the project using fully parallel interleaver and QPP interleaver in FPGA platform. the language used for coding is Verilog and it is synthesized in Xilinx.

    €132 (Avg Bid)
    €132 Offre moyenne
    7 offres

    ...for 1 hour work max! We have the attached 128*128 image, i just need some fixes and to run it and produce the new image after the median filter we pass it through microblaze FPGA in the c program. I specifucally want: 1. instead of arrays i want the resulting image to come off like a txt if possible 2. i want inside the code to include the part we

    €19 (Avg Bid)
    €19 Offre moyenne
    2 offres

    Hello everybody, I want a simple median filter in c embedded through a micriblaze fFPGA. I have some part of the code ready. i need it in 1 hour. If you got it lets talk :)

    €17 (Avg Bid)
    €17 Offre moyenne
    1 offres
    Project for Muaiyd Z. S'est terminé left

    Hello dear, I have this image table i produced through c embedded median filter code. i want this table to be passed through an FPGA microblaze and then deliver the new image. Thats all. interested? it is for today

    €9 (Avg Bid)
    €9 Offre moyenne
    1 offres
    Project for Hassaan Ahmad Q. S'est terminé left

    Hello dear, I have this image table i produced through c embedded median filter code. i want this table to be passed through an FPGA microblaze and then deliver the new image. Thats all. interested? it is for today

    €9 (Avg Bid)
    €9 Offre moyenne
    1 offres
    Project for Muhammad T. S'est terminé left

    Hello Dear, I have an urgent quick project. I have a...quick project. I have an embedded median filter of a table image 128*128 in c. I have the c code ready already. I just need you to take the median image 8*8 a nd pass it through FPGA with and without cache memory and then deliver the new images we get. It is for today please reply if interested

    €9 (Avg Bid)
    €9 Offre moyenne
    1 offres

    Hello Freelancers, I would like to pass my table image through a FPGA microblaze (both with cache and without cache) and have a s deliverables the 2 new images we get as results. This is for TODAY. Thank you in advance :)

    €9 - €26
    €9 - €26
    0 offres

    ...guys I will need these simple tasks for $10USD the deadline is today 8 September. Description In C language, i will need embedded a median filter that I need to pass after a FPGA microblaze with image data (128x128) (with and without cache memory). I would like comments on the code and the new resulting image as deliverables. I attach the image table

    €9 (Avg Bid)
    €9 Offre moyenne
    1 offres