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    2,883 e1 framer verilog travaux trouvés au tarif de EUR
    un mini formulaire S'est terminé left

    J’ai besoin d’un très petit script de page web qui formule un lien internet composer d’un préfix (SA) statique (qui ne change pas) d’une partie (E1) dynamique qui est un ‘echo ‘ d’un champs du formulaire (F1) d’une autre partie statique (SB) et d’une fin également (E2) dynamique qui est un ‘echo‘ d’un cha...

    €29 (Avg Bid)
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    3 offres
    Systemverilog-UVM tracer S'est terminé left

    Tracer using System verilog & UVM

    €236 (Avg Bid)
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    4 offres
    verilog project mips S'est terminé left

    MIPS ALU design

    €26 / hr (Avg Bid)
    €26 / hr Offre moyenne
    1 offres

    Read the MPZ paper (M. Faezipour and M. Nourani, "A Customized TCAM Architecture for Multi-Match Packet Classification," in Proceedings of the IEEE Global Telecommunications Conference (GLOBECOM), (San Francisco, CA), pp. CAM01.1.1-CAM01.1.5, Nov. 2006.) posted on the course webpage. Section III explains the Multi-Match Prioritizer (MPZ) unit. The conventional (single-match) priority...

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    Build a prototype 4 jours left
    VERIFIÉ

    Am looking for someone to support me on a personal project in building a protoype. The concept is a Fashion based quiz mobile app. Basically a multi choice format based on images. Where we are now is we are looking to create an interactive prototype of the app, would be 10-15 Questions(which are completed along with images). There have been trials done on Instagram so this is the next step befor...

    €579 (Avg Bid)
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    25 offres
    Verilog/VHDL -2 3 jours left
    VERIFIÉ

    Verilog Please solve as beginner and can you please provide the explanation of the code Deadline : 3 days ( 72 hours )

    €12 - €29
    Scellé
    €12 - €29
    14 offres
    Verilog/VHDL -1 3 jours left
    VERIFIÉ

    Verilog Please solve as beginner and can you please provide the explanation of the code Deadline : 4 days ( 96 hours )

    €17 - €41
    Scellé
    €17 - €41
    16 offres

    Budget is AUD 50 (all included). I have some questions which need to be answered. Message me for more details.

    €34 (Avg Bid)
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    8 offres

    Hello Everyone, I am looking for Electrical Engineers with strong background in following: • VHDL/Verilog, LABView/ Multisim • Microcontroller like Arduino, Raspberry Pi, FPGA, AVR, PIC and STM32. • IDEs like Keil MDK V5, ATmel studio and MPLab XC8.

    €107 (Avg Bid)
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    17 offres
    Build app ios swift code S'est terminé left

    Make an IOS App using swift code language (similar to [se connecter pour voir l'URL]) Requirement: - display my web (inbox me for more information) - camera and write external memory card permission. (allow the user to use a camera or post a photo directly to the web page) - Mark favorite page ( example: [se connecter pour voir l'URL]) - a separating tab for calculating interest rate (...

    €419 (Avg Bid)
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    12 offres
    Construa um projeto em Verilog S'est terminé left

    Criar um processador em verilog, contendo as especificações citadas no pdf.

    €168 (Avg Bid)
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    6 offres
    laminated_composite_deisgn_analysis S'est terminé left

    You have been assigned with the design of a composite shell for the wing of PC9 aircraft. Under Design Limit Load (DLL), the composite laminate is subjected to given ??, ?? and ???. The laminate configuration based on the aerospace design guidelines is required. Assume that zero and 90-degree plies do not contribute towards the shear strength of the laminate. Part A: Determining failure properties...

    €40 (Avg Bid)
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    7 offres
    Verilog/VHDL S'est terminé left

    Verilog Please solve as beginner and can you please provide the explanation of the code Deadline : 24 hours

    €29 - €30
    Scellé
    €29 - €30
    2 offres
    expert help in MS excel function. S'est terminé left

    Hello, need some expert help in MS excel function. This is for my book keeping. Please see my sheet in cell E1. I use there the "'find" function to assign a number value when the string is found. It works in E1 , F2 and also in G 3. But if the string is not found it returns "#Value" that is not good as this messes up my intention of adding them up at the end of the row...

    €15 (Avg Bid)
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    Video compression algorithm S'est terminé left

    Hi buddies, I am looking for a video compression algorithm for my video recording system. There may be any algorithm ( H.264/MPEG-4,HEVC, MJPEG) in RTL (verilog orVHDL) which will work on Xilinx spartan family with 30fps/60fps. This code includes the camera interface also. Because i am going to record the live video from camera upto 4k resolution(atleast HD).

    €84 (Avg Bid)
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    1 offres

    Verilog, and neural networks expert is needed for a project

    €20 (Avg Bid)
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    7 offres

    Verilog, and neural networks expert is needed for a project

    €16 (Avg Bid)
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    2 offres
    Verilog expert is needed S'est terminé left

    Verilog expert is needed for an implementation.

    €23 (Avg Bid)
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    10 offres
    An LSTM implementation in Verilog. S'est terminé left

    A Verilog, and FPGA expert is needed for the price shown.

    €10 (Avg Bid)
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    3 offres
    Dịch vụ SEO SEO4SALE S'est terminé left

    Dịch vụ SEO Google uy tín tại [se connecter pour voir l'URL] - SEO4SALES Web: [se connecter pour voir l'URL] Bản đồ: [se connecter pour voir l'URL]%8Bch+v%E1%BB%A5+SEO+Outsoure+-+SEO4SALES/@10.757465,106.644593,15z/data=!4m5!3m4!1s0x0:0x5473004eb6ebf645!8m2!3d10.757465!4d106.644593 GG Folder: [se connecter pour voir l'URL] AboutMe: [se connecter pour voir l'URL] Ang...

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    4 offres
    verilog coding S'est terminé left

    Verilog coding on Xilinx FGPA

    €15 / hr (Avg Bid)
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    9 offres
    MIPS 32 architecture S'est terminé left

    I need a design a MIPS 32 based simulink model in verilog. It is very basic with few operations like add sub load and branch.

    €150 (Avg Bid)
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    3 offres
    verilog expert needed-2 S'est terminé left

    i want long term employee. if you are expert in verilog, please bid here. Need to implement LSTM in verilog

    €101 (Avg Bid)
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    5 offres
    verilog expert needed-1 S'est terminé left

    i want long term employee. if you are expert in verilog, please bid here. Need to implement LSTM in verilog

    €3 / hr (Avg Bid)
    €3 / hr Offre moyenne
    1 offres
    verilog expert needed S'est terminé left

    i want long term employee. if you are expert in verilog, please bid here. Need to implement LSTM in verilog

    €3 / hr (Avg Bid)
    €3 / hr Offre moyenne
    2 offres
    Verilog Coder S'est terminé left

    I have a model that needs to be replicated in verilog.

    €26 (Avg Bid)
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    20 offres
    Verilog programming S'est terminé left

    Need someone familiar with verilog programming in Questasim.

    €340 (Avg Bid)
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    17 offres

    I want you to write a verilog code for radix 4 booth multiplier for 8,16,32 bit. i have you to use behavioral modelling. bid only if you know about radix 4 booth multiplier

    €14 (Avg Bid)
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    1 offres
    verilog work on quartus software S'est terminé left

    I need a one who is really good in verilog and have understanding about quartus software

    €17 (Avg Bid)
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    7 offres

    While trying to access the "D" drive of my laptop, its asking Bitlocker Key which I don't have. Looking for someone who can help me to Decrypt the "D" Drive and get the data safely. This issue arise while Microsoft Office 365 Team help me to upgrade my system from E1 to E3 subscription. Windows Tech Team & Dell Tech team working on the issue. Looking for faster resolut...

    €74 (Avg Bid)
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    3 offres

    Verilog implementation of an encoding algorithm that has a text file as an input and uses unused ascii characters to replace frequent occurring words. I can share the research paper, I need this done in a very short time of about less than 5 days

    €153 (Avg Bid)
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    5 offres

    We are starting a 1-year project which involves English to French, Spanish transaltion of various texts on the framer topic.

    €87 (Avg Bid)
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    33 offres

    Budget is AUD 20 fixed. Only bid if interested. Message me for more details.

    €11 (Avg Bid)
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    6 offres
    write a verilog code S'est terminé left

    Write verilog code for 6 sides traffic and 3 pedestrians using xilinx, quarutus or vivado

    €104 (Avg Bid)
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    6 offres
    Expert FPGA S'est terminé left

    an expert to complete my verilog code, more details will be given

    €64 (Avg Bid)
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    16 offres
    Project for Loganathan N. S'est terminé left

    hi,i want build an test verilog for k7 325t 676 ,for scrypt fpga miner

    €215 (Avg Bid)
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    1 offres

    hi,i want build an test verilog for k7 325t 676 ,for scrypt fpga miner

    €215 (Avg Bid)
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    1 offres
    Project for Muhammad B. S'est terminé left

    hi,i want build an test verilog for k7 325t 676 ,for scrypt fpga miner

    €215 (Avg Bid)
    €215 Offre moyenne
    1 offres

    Hello, we are looking for for an experienced FPGA Software developer, board designer, verilog programmer to help our organization to create a high speed hardware video encoder and decoder. Our initial ideal is to get to a extremely low latency SDI encoder and SDI decoder to be used for video audio communication, with up to 3G SDI support. HEVC and H.264 compression/decompression is mandatory. W...

    €3436 (Avg Bid)
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    16 offres
    Project for Ahmed M. S'est terminé left

    Hi Ahmed, I am searching for a developer to help me with a project requiring some FPGA work. Im using the Spartan 6 on the CMOD S6 development board. The task for the FPGA is to take 8 PDM Digital microphones, reformat the data, and send out to processor via SPI. Also take some commands from processor. Verilog is preferred and source will be req. Final product to be as complete as possible to ...

    €258 (Avg Bid)
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    1 offres

    Need someone familiar with Verilog, C, and logical circuits (Karnaugh maps, etc). The complete details will be provided in the chat.

    €61 (Avg Bid)
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    23 offres

    Hello, I want to design a verilog module where input is AXI Stream and output can be either RAW10 or RAW12 pixel data as per input selection. I have my own code for MIPI RAW8. Need to add RAW10 and RAW12 functionality.

    €11 (Avg Bid)
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    2 offres

    Bid for 2 hours of testing work (app to test in Burmese, with report in English) only. For people in Myanmar. 1. Anyone from Myanmar? How to test a Zawgyi encoding based android device? Are there any simulators out there ? On a device that has only Zawgyi encoding and font installed; text in Unicode encoding will look odd - wrong characters being drawn. Need to verify this so we know our app is h...

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    5 offres
    verilog code S'est terminé left

    Write verilog code for mips micro processor using super scaler and pipelining..

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    3 offres

    To implement a non-standard Modbus protocol using pymodbus. The message structure to read the hold register data given by the manufacturer is: address(1byte) + func. code(1byte) + Serial No:(10 bytes) + start reg:address(2 bytes)+length( 2bytes)+ checksum 01 03 31 32 31 34 33 32 34 33 35 33 6E 00 01 00 ...

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    9 offres

    To implement a non-standard Modbus protocol using pymodbus. The message structure to read the hold register data given by the manufacturer is: address(1byte) + func. code(1byte) + Serial No:(10 bytes) + start reg:address(2 bytes)+length( 2bytes)+ checksum 01 03 31 32 31 34 33 32 34 33 35 33 6E 00 01 00 ...

    €39 (Avg Bid)
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    3 offres