Embedded Engineers à embaucher
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Freelances parrainés
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Ingeniero en telecomunicaciones con mas de 5 años de experiencia en el manejo de equipos de redes. https://www.linkedin.com/in/eneidercolina/Ingeniero en telecomunicaciones con mas de 5 años de experiencia en el manejo de equipos de redes. https://www.linkedin.com/in/eneidercolina/ moins
Embaucher eneidercolina
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Hello, My name is Shikha Khandelwal from New Delhi. I am working with Jetking vikaspuri as Sr. Technical Trainer & Technical Head since 2015 to till date. As per my profile in Jetking, I have manage batches, maintain reports, labs as per requirement, student records, exam coordination etc Overview overall...Hello, My name is Shikha Khandelwal from New Delhi. I am working with Jetking vikaspuri as Sr. Technical Trainer & Technical Head since 2015 to till date. As per my profile in Jetking, I have manage batches, maintain reports, labs as per requirement, student records, exam coordination etc Overview overall professional experience Conducting Corporate Training for MCSE Training, Comptia N+ & Cisco CCNA. Content Creation for Professional courses & Setting up remote virtual labs for online Corporate Trainings. Corporate batches IN TAJ (MS-OFFICE), HSBC MICROSOFT SERVER IT Companies like JETKING INFOTRAIN, CMS, ROOMAN TECHNOLOGIES , IIJT etc. Training Overview +1000 corporate batches +10000 participants trained on various technical skills of CISCO CCNA, Microsoft server and Comptia Network Expertise in delivery of customised batches for Networking, Server and Infrastructure Conducted University workshops and Seminars for Btech students also taking batches of MS OFFICE, HARDWARE, OPERATING SYSTEMS ( WIN 7, 8, 8.1, 10, 11 ), NETWORK BASICS ( NETWORK, MEDIA, DEVICES, IPV4, IPV6, TOPOLOGY, OSI MODEL, SUBLETTING , VLSM, SUPER NETTING ), PYTHON BASICS, MICROSOFT SERVER 2012 , 2016 , 2019 , CCNA (Cisco Certified Network Associate), RHCSA(Redhat Certified System Administrator ) SA1 & SA2, AWS SAA C02/C03 ( CLOUD PRACTITIONER, AND ARCHITECT ASSOCIATE ( EC2, S3, VPC, SNS, CLOUD WATCH, EFS, DATABASE), OFFICE 365, I have 15+ year experience in IT TRAINER. 7 year experience in CMS as a trainer. 1 year in Rooman Technologies. I am post graduate MCA from IGNOU. & also M.Sc.(Maths). from purvanchal. I am MCSA certifified, Juniper & SDI certified. I have azure 300 certification. My hobbies are craft and visit to new places. as per my strength i am quick learner and punctual. i am very passionate to give training with full confidence. moins
Embaucher CETSHIKHA
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I am studying a Network Fundamentals, Network access and routing.,l am graduated from the Faculty of Electrical EngineeringI am studying a Network Fundamentals, Network access and routing.,l am graduated from the Faculty of Electrical Engineering moins
Embaucher AMD971
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During my five years of study at the national school of applied sciences, I developed a strong background in both embedded systems and systems control by completing advanced modules, for instance, embedded systems, operating systems, microprocessors, communications systems, digital signal processing. This diversity of...During my five years of study at the national school of applied sciences, I developed a strong background in both embedded systems and systems control by completing advanced modules, for instance, embedded systems, operating systems, microprocessors, communications systems, digital signal processing. This diversity of modules and intensive labs has shaped my vision about electronics engineering, particularly towards embedded systems which has become my main area of interest and strength and has allowed me to trace out my future career path as accurately as possible. moins
Embaucher NOUREDDINE20
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hieubinhnguyen hieubinhnguyen
$30 USD / heure
Design verification engineer, 9+ years experienceVietnamI am over 9 years as an design verification engineer. I am fluent in using system verilog and UVM to build verification test bench, making scenario to verify RTL design. I am also strong in debugging using Verdi, simvison tool. I am able to make cshell and python script to support for verification tasks. I have...I am over 9 years as an design verification engineer. I am fluent in using system verilog and UVM to build verification test bench, making scenario to verify RTL design. I am also strong in debugging using Verdi, simvison tool. I am able to make cshell and python script to support for verification tasks. I have experience with some IP such as USB, UFS/Unipro, VbyOne, MiPi IP moins
Embaucher hieubinhnguyen
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RIP, RIP-ng, EIGRP,OSPF,OSPFv3, IS-IS, BGP,Route Filtering, Route Summarization. IP Subnetting, VLSM, VRF, StaticNAT,DynamicNAT/PAT,802.1q,DTP, VLANs, VTP, VTP Pruning, MSTP, RSTP+, Ether channel, SPAN, RSPAN,HSRP,GLBP, VRR ACLS, MAC Address Security, BPDUGuard, BPDUFiltering, Port Security,Network Security,IPsec...RIP, RIP-ng, EIGRP,OSPF,OSPFv3, IS-IS, BGP,Route Filtering, Route Summarization. IP Subnetting, VLSM, VRF, StaticNAT,DynamicNAT/PAT,802.1q,DTP, VLANs, VTP, VTP Pruning, MSTP, RSTP+, Ether channel, SPAN, RSPAN,HSRP,GLBP, VRR ACLS, MAC Address Security, BPDUGuard, BPDUFiltering, Port Security,Network Security,IPsec VPN,DMVPN, MPLS VPN, Site-to-Site VPN,IPv4, IPv6, Subnetting, VLSM, FLSM,DHCP,DHCP Snooping,NTP, ACL, CDP, LLDP, moins
Embaucher janshoaib514
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Analog / Mixed Signal / Digital, DDR3 (PCIe, board design/fpga), DFM (Design for Manufacturing), Electronic Design, Electronique# Experience in RF/Analog Mixed Signal IC Layout Design 7nm, 10nm, 14nm, 28nm 40nm 65nm 130nm 180nm. > Bindkeys > Pcell creation . # Experienced in layout of IC functional blocks such as > IF block layouts (Amps ) > GPIO RX, TX. > RF block layouts (LDO , VCO , Bandgap Reference, , CML etc ) > PLL block layouts...# Experience in RF/Analog Mixed Signal IC Layout Design 7nm, 10nm, 14nm, 28nm 40nm 65nm 130nm 180nm. > Bindkeys > Pcell creation . # Experienced in layout of IC functional blocks such as > IF block layouts (Amps ) > GPIO RX, TX. > RF block layouts (LDO , VCO , Bandgap Reference, , CML etc ) > PLL block layouts (Frequency Dividers ,VCO , SYNTH TOP etc ) # Good understanding in Layout Design techniques : > Signal Flow ,Sheilding, Electro-Migration, Parasitic Elements, CrossTalk, Antenna Rules & Solutions , ESD(Protection Circuit), Latch - Up, Density Fill , Decaps, Customized capacitor , top level routing, Noise and Delay reduction. # Expert in LVS and DRC ( LV and RV) debug including the density checks in tools : > ASSURA, PVS,Calibre,Genesys. # Technology nodes : > 7nm, 10nm FinFet (INTEL) >14nm FinFet (INTEL) >28nm CMOS technology TSMC > 40nm CMOS Technology (TSMC) > 65nm CMOS Technology (TSMC) # Excellent working knowledge on back - end IC Design tools: > Cadence Virtuoso ToolSet (VLE, VXL) # DRC/LVS, QRC tools used : > Calibre , PVS , Assura , CPDS , Genesys. # Experience in full Chip Layout design # Knowledge in UNIX and Solaris WorkStation. # Able to work independently or with a team of Design Engineers Specialties: Cadence layout design, specification, good debugging skill , troubleshooting, Project 1. GPIO RX . Project 2. GPIO RX & TX . Project 3. Multiphase Oscillator for PLL in TSMC 28nm Technology . Description :This Project is carried out in TSMC 28nm Technology. Project 4. Dual Channel Transmit DAC for BT2.0 in TSMC28nm Project 5.Custom Logic Cell library in TSMC 28nm Project 6. Band gap reference (BGR) in TSMC 40nm Project.7 1.3 GHz PLL for DDR3 in TSMC65 nm RFCMOS Process Project8.CML Transmit Driver in TSMC40nm Responsibilities : Floorplan, Placement and Routing Layout DRC, LVS Tools . Cadence – dfII Virtuoso ,INTEL Cadence virtuoso layout editor, calibre Verification,Genesys verification. moins
Embaucher praveen141088
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I am an RTL design Engineer with 3+ year of professional experience with multinational companies. I have worked on state of the art complex designs with cutting edge technologies.I am an RTL design Engineer with 3+ year of professional experience with multinational companies. I have worked on state of the art complex designs with cutting edge technologies. moins
Embaucher malikshahid437
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Just tell me what do you want about computer and I do. Development, programming, about software and hardware. Internet and nets.Just tell me what do you want about computer and I do. Development, programming, about software and hardware. Internet and nets. moins
Embaucher marcosvictorross
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masanamramani145 masanamramani145
$20 USD / heure
Electronic design engineer associateUnited KingdomAnalog, Bill of Materials (BOM) Analysis, Bill of Materials (BOM) Evaluation, Bill of Materials (BOM) Optimization, Circuit Board LayoutProfessional hardware design engineer with more than 4 years of industrial experience. I have good domain knowledge on FPGA and high speed board design for the customer requirements and currently based in glasgow.Professional hardware design engineer with more than 4 years of industrial experience. I have good domain knowledge on FPGA and high speed board design for the customer requirements and currently based in glasgow. moins
Embaucher masanamramani145
